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2020 – today
- 2022
[j4]Yuanfa Wang, Qianneng Zhou, Jiasai Luo, Yi Lu, Huiqian Wang, Yu Pang, Zhiwei Huang:
VLSI design of multiclass classification using sparse extreme learning machine for epilepsy and seizure detection. IEICE Electron. Express 19(2): 20210536 (2022)- 2021
- [c6]Yuanfa Wang, Yu Pang, Huan Huang, Qianneng Zhou, Jiasai Luo:
Hardware Design of Gaussian Kernel Function for Non-Linear SVM Classification. ASICON 2021: 1-4
2010 – 2019
- 2017
- [c5]Qianneng Zhou, Feihong Cheng, Hongjuan Li, Kai Yan, Wei Luo:
High-order curvature-compensated CMOS bandgap voltage reference. ASICON 2017: 525-528 - 2016
- [c4]Tong Bai, Dan Li, Huiqian Wang, Yu Pang, Guoquan Li, Jinzhao Lin, Qianneng Zhou, Gwanggil Jeon:
A PPG Signal De-Noising Method Based on the DTCWT and the Morphological Filtering. SITIS 2016: 503-506 - 2014
- [j3]Guoquan Li, Ke Tang, Jinzhao Lin, Yu Pang, Zhangyong Li, Qianneng Zhou, Lu Deng:
Design of Modulation and Packet Detection in Body Area Networks. J. Comput. 9(4): 916-921 (2014) - [j2]Qianneng Zhou, Qi Li, Hongjuan Li, Jinzhao Lin, Yu Pang, Guoquan Li, Lu Deng:
A Sub-1V High-PSRR Piecewise-Linear Bandgap Reference. J. Comput. 9(5): 1274-1281 (2014) - [j1]Yu Pang, Yafeng Yan, Jinzhao Lin, Zhangyong Li, Qianneng Zhou, Wei Wu:
Designing Optimized Imprecise Fixed-Point Arithmetic Circuits Specified by polynomials with Various Constraints. J. Circuits Syst. Comput. 23(1) (2014)
2000 – 2009
- 2007
- [c3]Qianneng Zhou, Fengchang Lai, Yongsheng Wang:
On-Chip Voltage Down Converter Based on Moderate Inversion for Low- Power VLSI Chips. VLSI Design 2007: 433-438 - 2006
- [c2]Qianneng Zhou, Fengchang Lai, Mingyan Yu:
Embedded DC-DC Voltage Down Converter for Low-Power VLSI Chip. APCCAS 2006: 670-673 - [c1]Qianneng Zhou, Fengchang Lai, Mingyan Yu:
On-chip 3.3V-to-1.8V voltage down converter for low-power VLSI chips. ACM Great Lakes Symposium on VLSI 2006: 140-143
Coauthor Index
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