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James M. Baker Jr.
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2000 – 2009
- 2006
- [j3]Patrick Anthony La Fratta, James M. Baker Jr.:
Exploring power reduction options for a single-chip multiprocessor through system-level modeling. J. Embed. Comput. 2(2): 235-247 (2006) - 2004
- [j2]James M. Baker Jr., Brian T. Gold, Mark Bucciero, Sidney Bennett, Rajneesh Mahajan, Priyadarshini Ramachandran, Jignesh Shah:
SCMP: A Single-Chip Message-Passing Parallel Computer. J. Supercomput. 30(2): 133-149 (2004) - [c2]Priyadarshini Ramachandran, Charles W. Lewis Jr., James M. Baker Jr.:
A Power and Performance Simulator for a Single-Chip Message-Passing Parallel Architecture. MSV/AMCS 2004: 31-37 - 2002
- [c1]James M. Baker Jr., Sidney Bennett, Mark Bucciero, Brian T. Gold, Rajneesh Mahajan:
SCMP: A Single-chip Message-passing Parallel Computer. PDPTA 2002: 1485-1491
1990 – 1999
- 1997
- [j1]D. Scott Wills, Huy Cat, José Cruz-Rivera, W. Stephen Lacy, James M. Baker Jr., John Eble, Abelardo López-Lagunas, Michael A. Hopper:
High-Throughput, Low-Memory Applications on the Pica Architecture. IEEE Trans. Parallel Distributed Syst. 8(10): 1055-1067 (1997)
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