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2020 – today
- 2024
[j3]Jaehoon Heo
, Jung-Hoon Kim, Wontak Han, Jaeuk Kim, Joo-Young Kim:
SP-PIM: A Super-Pipelined Processing-In-Memory Accelerator With Local Error Prediction for Area/Energy-Efficient On-Device Learning. IEEE J. Solid State Circuits 59(8): 2671-2683 (2024)- [i2]Wontak Han, Hyunjun Cho, Donghyuk Kim, Joo-Young Kim:
SAL-PIM: A Subarray-level Processing-in-Memory Architecture with LUT-based Linear Interpolation for Transformer-based Text Generation. CoRR abs/2401.17005 (2024) - 2023
- [j2]Jaehoon Heo, Junsoo Kim, Sukbin Lim, Wontak Han, Joo-Young Kim:
T-PIM: An Energy-Efficient Processing-in-Memory Accelerator for End-to-End On-Device Training. IEEE J. Solid State Circuits 58(3): 600-613 (2023) - [c2]Jung-Hoon Kim, Jaehoon Heo, Wontak Han, Jaeuk Kim, Joo-Young Kim:
SP-PIM: A 22.41TFLOPS/W, 8.81Epochs/Sec Super-Pipelined Processing-In-Memory Accelerator with Local Error Prediction for On-Device Learning. VLSI Technology and Circuits 2023: 1-2 - [i1]Donghyuk Kim, Jae-Young Kim, Wontak Han, Jongsoon Won, Haerang Choi, Yongkee Kwon, Joo-Young Kim:
Darwin: A DRAM-based Multi-level Processing-in-Memory Architecture for Data Analytics. CoRR abs/2305.13970 (2023) - 2022
- [j1]Wontak Han, Jaehoon Heo, Junsoo Kim, Sukbin Lim, Joo-Young Kim:
Design of Processing-in-Memory With Triple Computational Path and Sparsity Handling for Energy-Efficient DNN Training. IEEE J. Emerg. Sel. Topics Circuits Syst. 12(2): 354-366 (2022) - [c1]Jaehoon Heo, Junsoo Kim, Wontak Han, Sukbin Lim, Joo-Young Kim:
T-PIM: A 2.21-to-161.08TOPS/W Processing-In-Memory Accelerator for End-to-End On-Device Training. CICC 2022: 1-2
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