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Junzhan Liu
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2020 – today
- 2024
- [j3]Lichuan Luo, Erya Deng, Dijun Liu, Zhen Wang, Weiliang Huang, He Zhang, Xiao Liu, Jinyu Bai, Junzhan Liu, Youguang Zhang, Wang Kang:
CiTST-AdderNets: Computing in Toggle Spin Torques MRAM for Energy-Efficient AdderNets. IEEE Trans. Circuits Syst. I Regul. Pap. 71(3): 1130-1143 (2024) - 2023
- [j2]Lichuan Luo, Wang Kang, Junzhan Liu, He Zhang, Youguang Zhang, Dijun Liu, Peng Ouyang:
A Reconfigurable Spatial Architecture for Energy-Efficient Inception Neural Networks. IEEE J. Emerg. Sel. Topics Circuits Syst. 13(1): 7-20 (2023) - 2022
- [j1]He Zhang, Junzhan Liu, Jinyu Bai, Sai Li, Lichuan Luo, Shaoqian Wei, Jianxin Wu, Wang Kang:
HD-CIM: Hybrid-Device Computing-In-Memory Structure Based on MRAM and SRAM to Reduce Weight Loading Energy of Neural Networks. IEEE Trans. Circuits Syst. I Regul. Pap. 69(11): 4465-4474 (2022) - [c2]He Zhang, Linjun Jiang, Jianxin Wu, Tingran Chen, Junzhan Liu, Wang Kang, Weisheng Zhao:
CP-SRAM: charge-pulsation SRAM marco for ultra-high energy-efficiency computing-in-memory. DAC 2022: 109-114 - 2021
- [c1]He Zhang, Junzhan Liu, Kang Wang, Yunqian Fan, Shufeng Fu, Jinyu Bai, Biao Pan, Yongpan Liu, Weisheng Zhao:
A 40nm 33.6Tops/W 8T-SRAM Computing-in-Memory Macro with DAC-less Spike-Pulse-Truncation Input and ADC-less Charge-Reservoir-Integrate-Counter Output. ICTA 2021: 123-124
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last updated on 2024-05-08 20:56 CEST by the dblp team
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