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Sirish Oruganti
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2020 – today
- 2024
- [c7]Mengtian Yang, Yipeng Wang, Shanshan Xie, Chieh-Pu Lo, Meizhi Wang, Sirish Oruganti, Rishabh Sehgal, Jaydeep P. Kulkarni:
CILP: An Arbitrary-bit Precision All-digital Compute-in-memory Solver for Integer Linear Programming Problems. CICC 2024: 1-2 - [c6]Sumanth N. Karanth, Sirish Oruganti, Meizhi Wang, Jaydeep P. Kulkarni:
Randomization Approaches for Secure SAR ADC Design Resilient Against Power Side-Channel Attacks. HOST 2024: 282-292 - [c5]Sirish Oruganti, Meizhi Wang, Vishnuvardhan V. Iyer, Yipeng Wang, Mengtian Yang, Raghavan Kumar, Sanu K. Mathew, Jaydeep P. Kulkarni:
Power and EM Side-Channel-Attack-Resilient AES-128 Core with Round-Aligned Globally-Synchronous-Locally-Asynchronous Operation Based on Tunable Replica Circuits. ISSCC 2024: 308-310 - 2023
- [c4]Yipeng Wang, Shanshan Xie, Jacob N. Rohan, Meizhi Wang, Mengtian Yang, Sirish Oruganti, Jaydeep P. Kulkarni:
A GNN Computing-in-Memory Macro and Accelerator with Analog-Digital Hybrid Transformation and CAMenabled Search-reduce. CICC 2023: 1-2 - [c3]S. S. Teja Nibhanupudi, Sirish Oruganti, Rahul Mathur, Nishant Gupta, Meizhi Wang, Jaydeep P. Kulkarni:
Invited: Buried Power Rails and Back-side Power Grids: Prospects and Challenges. DAC 2023: 1-4 - [c2]Shanshan Xie, Mengtian Yang, S. Andrew Lanham, Yipeng Wang, Meizhi Wang, Sirish Oruganti, Jaydeep P. Kulkarni:
Snap-SAT: A One-Shot Energy-Performance-Aware All-Digital Compute-in-Memory Solver for Large-Scale Hard Boolean Satisfiability Problems. ISSCC 2023: 420-421 - 2022
- [c1]Meizhi Wang, Sirish Oruganti, Shanshan Xie, Raghavan Kumar, Sanu Mathew, Jaydeep P. Kulkarni:
Fine-Grained Electromagnetic Side-Channel Analysis Resilient Secure AES Core with Stacked Voltage Domains and Spatio-temporally Randomized Circuit Blocks. ESSCIRC 2022: 529-532
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last updated on 2024-10-07 21:25 CEST by the dblp team
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