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Shigeyoshi Watanabe
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2010 – 2019
- 2017
- [j13]Naohisa Fukase, Yasuyuki Miura, Shigeyoshi Watanabe, M. M. Hafizur Rahman
:
The Performance Evaluation of a 3D Torus Network Using Partial Link-Sharing Method in NoC Router Buffer. IEICE Trans. Inf. Syst. 100-D(10): 2478-2492 (2017) - 2016
- [c14]Naohisa Fukase, Yasuyuki Miura, Shigeyoshi Watanabe, M. M. Hafizur Rahman:
The performance evaluation of 3D torus using link-sharing method in NoC router. ICCE-TW 2016: 1-2 - 2015
- [j12]Yasuyuki Miura, Kentaro Shimozono, Naohisa Fukase, Shigeyoshi Watanabe, Kazuya Matoyama:
An Adaptive Routing Algorithm of 2-D Torus Network Based on Turn Model: The Communication Performance. Int. J. Netw. Comput. 5(1): 223-238 (2015) - 2014
- [j11]Hiroshi Ninomiya, Manabu Kobayashi, Yasuyuki Miura, Shigeyoshi Watanabe:
Reconfigurable Circuit Design Based on Arithmetic Logic Unit Using Double-Gate CNTFETs. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 97-A(2): 675-678 (2014) - [j10]Manabu Kobayashi, Hiroshi Ninomiya, Yasuyuki Miura, Shigeyoshi Watanabe:
Reconfigurable Dynamic Logic Circuit Generating t-Term Boolean Functions Based on Double-Gate CNTFETs. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 97-A(5): 1051-1058 (2014) - [c13]Naohisa Fukase, Yasuyuki Miura, Shigeyoshi Watanabe, M. M. Hafizur Rahman
:
The Proposal of Partial Sharing for Link-Sharing Method of Buffer in NoC Router. CANDAR 2014: 567-571 - 2013
- [j9]Hiroshi Ninomiya, Manabu Kobayashi, Shigeyoshi Watanabe:
Reduced Reconfigurable Logic Circuit Design Based on Double Gate CNTFETs Using Ambipolar Binary Decision Diagram. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 96-A(1): 356-359 (2013) - [j8]Manabu Kobayashi, Hiroshi Ninomiya, Shigeyoshi Watanabe:
Circuit Design of Reconfigurable Logic Based on Double-Gate CNTFETs. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 96-A(7): 1642-1644 (2013) - [j7]Tomohiro Nakada
, Keiki Takadama, Shigeyoshi Watanabe:
Analysis of emission right prices in greenhouse gas emission trading via agent-based model. Multiagent Grid Syst. 9(3): 227-246 (2013) - [c12]Yasuyuki Miura, Kazuya Matoyama, Kentaro Shimozono, Shigeyoshi Watanabe:
An Adaptive Routing of the 2-D Torus Network Based on Turn Model. CANDAR 2013: 587-591 - 2010
- [j6]Shigeyoshi Watanabe:
Foreword. IEICE Trans. Electron. 93-C(5): 533 (2010) - [c11]Yasuyuki Miura, Masato Suzuki, Ryo Morikawa, Shigeyoshi Watanabe:
Subtractive Color Process for Lossless Compression of Non-photographed Images. IPCV 2010: 615-621 - [c10]Yasuyuki Miura, Masahiro Kaneko, Shigeyoshi Watanabe:
Adaptive routing algorithms and implementation for interconnection network TESH for parallel processing. LCN 2010: 308-311
2000 – 2009
- 2008
- [c9]Ryota Arai, Shigeyoshi Watanabe:
A Quantitative Method for Comparing Multi-Agent-Based Simulations in Feature Space. MABS 2008: 154-166 - 2007
- [c8]Guilan Zhi, Shigeyoshi Watanabe:
Comparison of discriminatory pricing and uniform pricing rules in electricity markets using an agent model with risk consideration. IEEE Congress on Evolutionary Computation 2007: 2546-2553 - [c7]Zuoliang Chen, Shigeyoshi Watanabe:
A Case Study of Applying SNA to Analyze CSCL Social Network. ICALT 2007: 18-20 - 2006
- [j5]Takashi Ohsawa
, Katsuyuki Fujita, Kosuke Hatsuda, Tomoki Higashi, Tomoaki Shino, Yoshihiro Minami, Hiroomi Nakajima, Mutsuo Morikado, Kazumi Inoh, Takeshi Hamamoto, Shigeyoshi Watanabe, Shuso Fujii, Tohru Furuyama:
Design of a 128-mb SOI DRAM using the floating body cell (FBC). IEEE J. Solid State Circuits 41(1): 135-145 (2006) - [c6]Guilan Zhi, Shigeyoshi Watanabe:
A Fuzzy Model for Bidding Behavior of Participants in Electricity Markets. ICICIC (2) 2006: 199-203 - 2005
- [c5]Tomomi Takashina
, Zhenbo Bi, Ariuna Damba, Guilan Zhi, Kazuhide Tanaka, Hiroki Sayama, Shigeyoshi Watanabe:
MASSE: environment supporting for simulation and analysis of multiagent systems. CTS 2005: 203-209 - [c4]Zuoliang Chen, Shigeyoshi Watanabe:
Culture & Motivation: Establishing an International Storytelling Forum. CELDA 2005: 387-390 - [c3]Ariuna Damba, Shigeyoshi Watanabe:
Policy Control in Multiagent System. Computational Intelligence 2005: 292-297 - 2004
- [c2]Ariuna Damba, Shigeyoshi Watanabe:
Intelligent control in dynamic system. RAM 2004: 644-648 - 2002
- [c1]Tomomi Takashina
, Kazuhide Tanaka, Shigeyoshi Watanabe:
Individual Level Analysis Using Decision Making Features in Multiagent Based Simulation. PRIMA 2002: 33-47
1990 – 1999
- 1998
- [j4]Daisaburo Takashima, Yukihito Oowaki, Shigeyoshi Watanabe, Kazunori Ohuchi:
Noise suppression scheme for gigabit-scale and gigabyte/s data-rate LSI's. IEEE J. Solid State Circuits 33(2): 260-267 (1998) - 1994
- [j3]Yohji Watanabe, Nobuo Nakamura, Shigeyoshi Watanabe:
Offset compensating bit-line sensing scheme for high density DRAM's. IEEE J. Solid State Circuits 29(1): 9-13 (1994) - [j2]Daisaburo Takashima, Shigeyoshi Watanabe, Hiroalu Nakano, Yukihito Oowaki, Kazunori Ohuchi, Hiroyuki Tango:
Standby/active mode logic for sub-1-V operating ULSI memory. IEEE J. Solid State Circuits 29(4): 441-447 (1994) - [j1]Daisaburo Takashima, Shigeyoshi Watanabe, Hiroaki Nakano, Yukihito Oowaki, Kazunori Ohuchi:
Open/folded bit-line arrangement for ultra-high-density DRAM's. IEEE J. Solid State Circuits 29(4): 539-542 (1994)
Coauthor Index
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