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Zongle Huang
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2020 – today
- 2025
- [c5]Wenbin Jia, Yifan He, Xiang Li, Yixuan Xie, Zongle Huang, Wenxun Wang, Boju Chen, Yaolei Li, Jinshan Yue, Xueqing Li, Huazhong Yang, Hongyang Jia, Yongpan Liu:
Pro-Cache-CIM: A 28nm 69.4TOPS/W Product-Cache-based Digital-Compute-in-Memory Macro Leveraging Data Locality Pattern in Vision AI Tasks. CICC 2025: 1-3 - [c4]Chen Tang, Zongle Huang, Wenxun Wang, Yifan He, Shupei Fan, Xiaoyu Feng, Wenyu Sun, Yongpan Liu:
CCE: A 28nm Content Creation Engine with Asymmetric Computing, Semantic-Driven Instruction Generation and Collision-Free Outlier Mapper for Video Generation. CICC 2025: 1-3 - [i3]Xinyuan Lin, Chenlu Li, Zongle Huang, Chunyu Wang, Bo Xiao, Huazhong Yang, Shishi Duan, Yongpan Liu:
Enhancing Memory Efficiency in Large Language Model Training Through Chronos-aware Pipeline Parallelism. CoRR abs/2503.03182 (2025) - [i2]Zongle Huang, Lei Zhu, Zongyuan Zhan, Ting Hu, Weikai Mao, Xianzhi Yu, Yongpan Liu, Tianyu Zhang:
MoESD: Unveil Speculative Decoding's Potential for Accelerating Sparse MoE. CoRR abs/2505.19645 (2025) - 2024
- [c3]Yifan He, Shupei Fan, Xuan Li, Luchang Lei, Wenbin Jia, Chen Tang, Yaolei Li, Zongle Huang, Zhike Du, Jinshan Yue, Xueqing Li, Huazhong Yang, Hongyang Jia, Yongpan Liu:
34.7 A 28nm 2.4Mb/mm2 6.9 - 16.3TOPS/mm2 eDRAM-LUT-Based Digital-Computing-in-Memory Macro with In-Memory Encoding and Refreshing. ISSCC 2024: 578-580 - [c2]Liu He, Yujin Wang, Zongle Huang, Shupei Fan, Chen Tang
, Shuyuan Zhang
, Luchang Lei, Huazhong Yang, Yongpan Liu, Hongyang Jia:
Exploring Approximation and Dataflow Co-Optimization for Scalable Transformer Inference Architecture on the Edge. SOCC 2024: 1-6 - [c1]Chen Tang, Xinyuan Lin
, Zongle Huang, Wenyu Sun, Hongyang Jia, Yongpan Liu:
A 28nm 4.35TOPS/mm2 Transformer Accelerator with Basis-vector Based Ultra Storage Compression, Decomposed Computation and Unified LUT-Assisted Cores. VLSI Technology and Circuits 2024: 1-2 - [i1]Zongle Huang, Shupei Fan, Chen Tang, Xinyuan Lin, Shuwen Deng, Yongpan Liu:
Hecaton: Training and Finetuning Large Language Models with Scalable Chiplet Systems. CoRR abs/2407.05784 (2024)
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last updated on 2025-08-06 23:14 CEST by the dblp team
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