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ORCIDNuno Horta
Nuno C. G. Horta – Nuno Cavaco Gomes Horta
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- affiliation: Instituto de Telecomunicaçoes, Portugal
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2020 – today
- 2024
[j51]Gustavo Liñán Cembrano
, Nuno Lourenço, Nuno Horta, José M. de la Rosa:
Design Automation of Analog and Mixed-Signal Circuits Using Neural Networks - A Tutorial Brief. IEEE Trans. Circuits Syst. II Express Briefs 71(3): 1677-1682 (2024)- 2023
- [j50]Rafael Vieira, Fábio Passos, Ricardo Martins, Nuno Horta, Nuno Lourenço:
Behavioral Analysis of Noise and Bandwidth Specifications of Heartbeat Detection Circuits for Ultra Low Power Devices. IEEE Access 11: 27330-27341 (2023) - [c98]Fábio Passos, Nuno Lourenço, Luís Mendes, Ricardo Martins, João Caldinhas Vaz, Nuno Horta:
Efficient Hierarchical mm-Wave System Synthesis with Embedded Accurate Transformer and Balun Machine Learning Models. ASP-DAC 2023: 64-69 - [c97]André Amaral, António Gusmão, Rafael Vieira, Ricardo Martins, Nuno Horta, Nuno Lourenço:
An ANN-Based Approach to the Modelling and Simulation of Analogue Circuits. SMACD 2023: 1-4 - [c96]Fábio Passos, Nuno Lourenço, Luís Mendes, Ricardo Martins, João Caldinhas Vaz, Nuno Horta:
A 23.5-32.5GHz, 17dBm PSAT and 37.5% PAE Power Amplifier Synthesized Using an Automated Design Methodology. SMACD 2023: 1-4 - [c95]Rafael Vieira, Ricardo Martins, Nuno Horta, Nuno Lourenço:
Design Space Exploration of Single-Stage OTAs towards an Ultra-Low-Power LNA for ECG Signals. SMACD 2023: 1-4 - 2022
- [j49]António Gusmão, Ricardo Póvoa, Nuno Horta, Nuno Lourenço, Ricardo Martins:
DeepPlacer: A custom integrated OpAmp placement tool using deep models. Appl. Soft Comput. 115: 108188 (2022) - [j48]António Paiva Lapas de Gusmão, Nuno Cavaco Gomes Horta, Nuno Calado Correia Lourenço, Ricardo Miguel Ferreira Martins:
Scalable and order invariant analog integrated circuit placement with Attention-based Graph-to-Sequence deep models. Expert Syst. Appl. 207: 117954 (2022) - [j47]Yannik Zeiträg, José Rui Figueira, Nuno Horta, Rui Neves:
Surrogate-assisted automatic evolving of dispatching rules for multi-objective dynamic job shop scheduling using genetic programming. Expert Syst. Appl. 209: 118194 (2022) - [c94]Fábio Passos, Rafael Vieira, António Canelas, Ricardo Póvoa, Nuno Lourenço, Nuno Horta, Jorge Guilherme:
A Radiation-Hardened Frequency-Locked Loop On-Chip Oscillator with 33.6ppm/°C Stability for Space Applications. ISCAS 2022: 1-5 - [c93]Pedro Vaz, António Gusmão, Nuno Horta, Nuno Lourenço, Ricardo Martins:
Speeding-Up Complex RF IC Sizing Optimizations with a Process, Voltage and Temperature Corner Performance Estimator based on ANNs. ISCAS 2022: 1570-1574 - [c92]Nuno Lourenço, Fábio Passos, Rafael Vieira, Ricardo Martins, Nuno Horta, Jorge Guilherme, Ricardo Póvoa:
Radiation-Hardened Bandgap Voltage and Current Reference for Space Applications with 2.38 ppm/°C Temperature Coefficient. SMACD 2022: 1-4 - [c91]Pedro Alves, António Gusmão, Nuno Horta, Nuno Lourenço, Ricardo Martins:
ANN-based Analog IC Floorplan Recommender with a Broader Topological Constraints Coverage. SMACD 2022: 1-4 - [c90]João Domingues, António Gusmão, Nuno Horta, Nuno Lourenço, Ricardo Martins:
Accelerating Voltage-Controlled Oscillator Sizing Optimizations with ANN-based Convergence Classifiers and Frequency Guess Predictors. SMACD 2022: 1-4 - [c89]Fábio Passos, Nuno C. Lourenço, Ricardo Martins, Elisenda Roca, Rafael Castro-López, Nuno Horta, Francisco V. Fernández:
Machine Learning Approaches for Transformer Modeling. SMACD 2022: 1-4 - [c88]Rafael Vieira, Fábio Passos, Ricardo Povoa, Ricardo Martins, Nuno Horta, Jorge Guilherme, Nuno Lourenço:
Architectural Design for Heartbeat Detection Circuits using Verilog-A Behavioral Modeling. SMACD 2022: 1-4 - 2021
- [j46]António Canelas, Fábio Passos, Nuno Lourenço, Ricardo Martins, Elisenda Roca, Rafael Castro-López, Nuno Horta, Francisco V. Fernández:
Hierarchical Yield-Aware Synthesis Methodology Covering Device-, Circuit-, and System-Level for Radiofrequency ICs. IEEE Access 9: 124152-124164 (2021) - [j45]Ricardo Martins, Nuno Lourenço, Ricardo Póvoa, Nuno Horta:
Shortening the gap between pre- and post-layout analog IC performance by reducing the LDE-induced variations with multi-objective simulated quantum annealing. Eng. Appl. Artif. Intell. 98: 104102 (2021) - [c87]António Gusmão, Nuno Horta, Nuno Lourenço, Ricardo Martins:
Late Breaking Results: Attention in Graph2Seq Neural Networks towards Push-Button Analog IC Placement. DAC 2021: 1360-1361 - 2020
- [b2]António Gusmão, Nuno Horta, Nuno Lourenço, Ricardo Martins:
Analog IC Placement Generation via Neural Networks from Unlabeled Data. Springer 2020, ISBN 978-3-030-50060-3, pp. 1-84 - [j44]Fábio Passos, Elisenda Roca, Ricardo Martins, Nuno Lourenço, Saiyd Ahyoune, Javier J. Sieiro, Rafael Castro-López, Nuno Horta, Francisco V. Fernández:
Ready-to-Fabricate RF Circuit Synthesis Using a Layout- and Variability-Aware Optimization-Based Methodology. IEEE Access 8: 51601-51609 (2020) - [j43]Simão Moraes Sarmento, Nuno Horta:
Enhancing a Pairs Trading strategy with the application of Machine Learning. Expert Syst. Appl. 158: 113490 (2020) - [j42]Ricardo Póvoa, António Canelas, Ricardo Martins, Nuno Horta, Nuno Lourenço, João Goes:
A new family of CMOS inverter-based OTAs for biomedical and healthcare applications. Integr. 71: 38-48 (2020) - [j41]Ricardo Póvoa, Richa Arya, António Canelas, Fábio Passos, Ricardo Martins, Nuno Lourenço, Nuno Horta:
Sub-μW Tow-Thomas based biquad filter with improved gain for biomedical applications. Microelectron. J. 95 (2020) - [j40]António Canelas, Ricardo Póvoa, Ricardo Martins, Nuno Lourenço, Jorge Guilherme, João Paulo Carvalho, Nuno Horta:
FUZYE: A Fuzzy c-Means Analog IC Yield Optimization Using Evolutionary-Based Algorithms. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(1): 1-13 (2020) - [j39]Ricardo Póvoa, Nuno Lourenço, Ricardo Martins, António Canelas, Nuno Horta, João Goes:
A Folded Voltage-Combiners Biased Amplifier for Low Voltage and High Energy-Efficiency Applications. IEEE Trans. Circuits Syst. II Express Briefs 67-II(2): 230-234 (2020) - [j38]Ricardo Martins, Nuno Lourenço, Nuno Horta, Shenke Zhong, Jun Yin, Pui-In Mak, Rui Paulo Martins:
Design of a 4.2-to-5.1 GHz Ultralow-Power Complementary Class-B/C Hybrid-Mode VCO in 65-nm CMOS Fully Supported by EDA Tools. IEEE Trans. Circuits Syst. 67-I(11): 3965-3977 (2020) - [c86]António Gusmão, Fábio Passos, Ricardo Póvoa, Nuno Horta, Nuno Lourenço, Ricardo Martins:
Semi-Supervised Artificial Neural Networks towards Analog IC Placement Recommender. ISCAS 2020: 1-5
2010 – 2019
- 2019
- [j37]Daniela Moniz, João Pedro, Nuno Horta, João Pires:
Multi-objective framework for cost-effective OTN switch placement using NSGA-II with embedded domain knowledge. Appl. Soft Comput. 83 (2019) - [j36]Ricardo Martins, Nuno Lourenço, Fábio Passos, Ricardo Povoa, António Canelas, Elisenda Roca, Rafael Castro-López, Javier J. Sieiro, Francisco V. Fernández, Nuno Horta:
Two-Step RF IC Block Synthesis With Preoptimized Inductors and Full Layout Generation In-the-Loop. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(6): 989-1002 (2019) - [j35]Ricardo Martins, Nuno Lourenço, Nuno Horta, Jun Yin, Pui-In Mak, Rui Paulo Martins:
Many-Objective Sizing Optimization of a Class-C/D VCO for Ultralow-Power IoT and Ultralow-Phase-Noise Cellular Applications. IEEE Trans. Very Large Scale Integr. Syst. 27(1): 69-82 (2019) - [c85]Daniel Guerra, António Canelas, Ricardo Póvoa, Nuno Horta, Nuno Lourenço, Ricardo Martins:
Artificial Neural Networks as an Alternative for Automatic Analog IC Placement. SMACD 2019: 1-4 - [c84]Nuno Lourenço, Engin Afacan, Ricardo Martins, Fábio Passos, António Canelas, Ricardo Póvoa, Nuno Horta, Günhan Dündar:
Using Polynomial Regression and Artificial Neural Networks for Reusable Analog IC Sizing. SMACD 2019: 13-16 - [c83]Ricardo Martins, Nuno Lourenço, Ricardo Póvoa, Nuno Horta:
On the Exploration of Design Tradeoffs in Analog IC Placement with Layout-dependent Effects. SMACD 2019: 25-28 - [c82]Ricardo Martins, Nuno Lourenço, Nuno Horta, Jun Yin, Pui-In Mak, Rui Paulo Martins:
Using EDA Tools to Push the Performance Boundaries of an Ultralow-Power IoT-VCO at 65nm. SMACD 2019: 37-40 - [c81]Fábio Passos, Elisenda Roca, Rafael Castro-López, Nuno Horta, Francisco V. Fernández:
Synthesis of mm-Wave circuits using-EM-simulated passive structure libraries. SMACD 2019: 57-60 - [c80]Ricardo Póvoa, António Canelas, Ricardo Martins, Nuno Horta, Nuno Lourenço, João Goes:
A Low Noise CMOS Inverter-Based OTA for and Healthcare Signal Receivers. SMACD 2019: 161-164 - [c79]Nuno Lourenço, Ricardo Martins, António Canelas, Ricardo Póvoa, Nuno Horta, Emmanuel Moutaye:
Hard and Soft Constraints for Multi-objective Analog IC Sizing Optimization. SMACD 2019: 285-288 - 2018
- [j34]Bernardo Jubert de Almeida, Rui Ferreira Neves, Nuno Horta:
Combining Support Vector Machine with Genetic Algorithms to optimize investments in Forex markets with high leverage. Appl. Soft Comput. 64: 596-613 (2018) - [j33]João Carapuço, Rui Ferreira Neves, Nuno Horta:
Reinforcement learning applied to Forex trading. Appl. Soft Comput. 73: 783-794 (2018) - [j32]João Baúto, António Canelas, Rui Ferreira Neves, Nuno Horta:
Parallel SAX/GA for financial pattern matching using NVIDIA's GPU. Expert Syst. Appl. 105: 77-88 (2018) - [j31]Jonathan Calvillo, Ricardo Póvoa, Jorge Guilherme, Nuno Horta:
Second-order compensation BGR with low TC and high performance for space applications. Integr. 63: 256-265 (2018) - [j30]Giulia Di Capua, Nuno Horta, Francisco V. Fernández, Günhan Dündar, Salvatore Pennisi, Gaetano Palumbo, Massimo Alioto, Gianluca Giustolisi:
Guest Editorial Special Issue on Selected Papers from PRIME 2017 and SMACD 2017. Integr. 63: 273-274 (2018) - [j29]Fábio Passos, Ricardo Martins, Nuno Lourenço, Elisenda Roca, Ricardo Povoa, António Canelas, Rafael Castro-López, Nuno Horta, Francisco V. Fernández:
Enhanced systematic design of a voltage controlled oscillator using a two-step optimization methodology. Integr. 63: 351-361 (2018) - [j28]Sérgio Sabino, Nuno Horta, António Grilo:
Centralized Unmanned Aerial Vehicle Mesh Network Placement Scheme: A Multi-Objective Evolutionary Algorithm Approach. Sensors 18(12): 4387 (2018) - [j27]Ricardo Povoa, Nuno Lourenço, Ricardo Martins, António Canelas, Nuno Cavaco Gomes Horta, João Goes:
Single-Stage Amplifier Biased by Voltage Combiners With Gain and Energy-Efficiency Enhancement. IEEE Trans. Circuits Syst. II Express Briefs 65-II(3): 266-270 (2018) - [j26]Ricardo Povoa, Nuno Lourenço, Ricardo Martins, António Canelas, Nuno Horta, João Goes:
Single-Stage OTA Biased by Voltage-Combiners With Enhanced Performance Using Current Starving. IEEE Trans. Circuits Syst. II Express Briefs 65-II(11): 1599-1603 (2018) - [c78]Tiago Pessoa, Nuno Lourenço, Ricardo Martins, Ricardo Povoa, Nuno Horta:
Enhanced analog and RF IC sizing methodology using PCA and NSGA-II optimization kernel. DATE 2018: 660-665 - [c77]Jigme Zangpo, Ricardo Povoa, Jorge Guilherme, Nuno Horta:
An Integrated LC Oscillator with Self Compensation for Frequency Drift and PVT Corners Variations. ICECS 2018: 333-336 - [c76]Rodrigo Granja, Mauro Santos, Jorge Guilherme, Nuno Horta:
11.7b Time-To-Digital Converter with 0.82ps resolution in 130nm CMOS Technology. PRIME 2018: 29-32 - [c75]António Canelas, Ricardo Povoa, Ricardo M. F. Martins, Nuno Lourenço, Jorge Guilherme, Nuno Horta:
A 20 DB Gain Two-Stage Low-Noise Amplifier with High Yield for 5 GHz Applications. SMACD 2018: 1-4 - [c74]Fábio Passos, Ricardo Martins, Nuno C. Lourenço, Elisenda Roca, Rafael Castro-López, Ricardo Povoa, António Canelas, Nuno Horta, Francisco V. Fernández:
Handling the Effects of Variability and Layout Parasitics in the Automatic Synthesis of LNAs. SMACD 2018: 1-164 - [c73]Ricardo Martins, Nuno Lourenço, Nuno Horta, Jun Yin, Pui-In Mak, Rui Paulo Martins:
Design and Optimization of a Class-C/D VCO for Ultra-Low-Power IoT and Cellular Applications. SMACD 2018: 129-132 - [c72]Nuno Lourenço, Joao Rosa, Ricardo Martins, Helena Aidos, António Canelas, Ricardo Povoa, Nuno Horta:
On the Exploration of Promising Analog IC Designs via Artificial Neural Networks. SMACD 2018: 133-136 - [i1]Gonçalo Abreu, Rui Ferreira Neves, Nuno Horta:
Currency exchange prediction using machine learning, genetic algorithms and technical analysis. CoRR abs/1805.11232 (2018) - 2017
- [j25]Mariana Daniel, Rui Ferreira Neves, Nuno Horta:
Company event popularity for financial markets using Twitter and sentiment analysis. Expert Syst. Appl. 71: 111-124 (2017) - [j24]Nuno Horta, Andrea Baschirotto, Francisco V. Fernández, Günhan Dündar, João Goes, Jorge Fernandes:
Introduction to the special issue on PRIME 2016 and SMACD 2016. Integr. 58: 411-412 (2017) - [j23]Ricardo Martins, Nuno Lourenço, António Canelas, Nuno Horta:
Stochastic-based placement template generator for analog IC layout-aware synthesis. Integr. 58: 485-495 (2017) - [c71]Carlos Simões, Rui Ferreira Neves, Nuno Horta:
Using sentiment from Twitter optimized by Genetic Algorithms to predict the stock market. CEC 2017: 1303-1310 - [c70]António Canelas, Ricardo Martins, Ricardo Povoa, Nuno Lourenço, Nuno Horta:
Efficient yield optimization method using a variable K-Means algorithm for analog IC sizing. DATE 2017: 1201-1206 - [c69]Jose Cachaco, Nuno Machado, Nuno Lourenço, Jorge Guilherme, Nuno Horta:
Automatic technology migration of analog IC designs using generic cell libraries. DATE 2017: 1281-1284 - [c68]Jonathan Calvillo, Jorge Guilherme, Nuno Horta:
Design of a BGR Suitable for the Space Industry with Performance of 1.25 V with 0.758 ppm/°C TC from - 55° to 125°C. NGCAS 2017: 197-200 - [c67]Nuno C. Lourenço, Ricardo Martins, Ricardo Povoa, António Canelas, Nuno Horta, Fábio Passos, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández:
New mapping strategies for pre-optimized inductor sets in bottom-up RF IC sizing optimization. SMACD 2017: 1-4 - [c66]Ricardo Martins, Nuno C. Lourenço, Ricardo Povoa, António Canelas, Nuno Horta, Fábio Passos, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández:
Layout-aware challenges and a solution for the automatic synthesis of radio-frequency IC blocks. SMACD 2017: 1-4 - [c65]Fábio Passos, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández, Ricardo Martins, Nuno C. Lourenço, Ricardo Povoa, António Canelas, Nuno C. G. Horta:
Systematic design of a voltage controlled oscillator using a layout-aware approach. SMACD 2017: 1-4 - 2016
- [j22]Nuno Neves, Rui Neves, Nuno Horta, Pedro Tomás, Nuno Roma:
Multi-objective kernel mapping and scheduling for morphable many-core architectures. Expert Syst. Appl. 45: 385-399 (2016) - [j21]João Leitão, Rui Ferreira Neves, Nuno Horta:
Combining rules between PIPs and SAX to identify patterns in financial markets. Expert Syst. Appl. 65: 242-254 (2016) - [j20]Danial Yazdani, Alireza Sepas-Moghaddam, Atabak Dehban, Nuno Horta:
A Novel Approach for Optimization in Dynamic Environments Based on Modified Artificial Fish Swarm Algorithm. Int. J. Comput. Intell. Appl. 15(2): 1650010:1-1650010:23 (2016) - [j19]Ricardo Povoa, Ivan Bastos, Nuno Lourenço, Nuno Horta:
Automatic synthesis of RF front-end blocks using multi-objective evolutionary techniques. Integr. 52: 243-252 (2016) - [j18]Günhan Dündar, Nuno Horta, Francisco V. Fernández:
Introduction to the special issue on SMACD 2015. Integr. 55: 293-294 (2016) - [j17]Ricardo Martins, Ricardo Povoa, Nuno Lourenço, Nuno Horta:
Current-flow and current-density-aware multi-objective optimization of analog IC placement. Integr. 55: 295-306 (2016) - [j16]Nuno Lourenço, Ricardo Martins, António Canelas, Ricardo Povoa, Nuno Horta:
AIDA: Layout-aware analog circuit-level sizing with in-loop layout generation. Integr. 55: 316-329 (2016) - [j15]Mrinalinee Pandey, António Canelas, Ricardo Póvoa, Jorge Alves Torres, João Costa Freire, Nuno Lourenço, Nuno Horta:
Design and application of a CMOS active inductor at Ku band based on a multi-objective optimizer. Integr. 55: 330-340 (2016) - [j14]Mauro Santos, Nuno Horta, Jorge Guilherme:
Logarithmic AD Converter With Selectable Transfer Characteristic. IEEE Trans. Circuits Syst. II Express Briefs 63-II(3): 234-238 (2016) - [c64]David Neves, Ricardo Martins, Nuno Lourenço, Nuno Horta:
Design automation tasks scheduling for enhanced parallel execution of a state-of-the-art layout-aware sizing approach. DATE 2016: 1513-1516 - [c63]Ricardo Martins, António Canelas, Nuno Lourenço, Nuno Horta:
On-the-fly exploration of placement templates for analog IC layout-aware sizing methodologies. SMACD 2016: 1-4 - [c62]António Canelas, Ricardo Martins, Ricardo Povoa, Nuno Lourenço, Nuno Horta:
Yield optimization using k-means clustering algorithm to reduce Monte Carlo simulations. SMACD 2016: 1-4 - [c61]Andre Ferreira, Nuno Lourenço, Ricardo Martins, Nuno Horta:
Automated analog IC design constraints generation for a layout-aware sizing approach. SMACD 2016: 1-4 - [c60]Carlos Silva, Jorge Guilherme, Nuno Horta:
SCALES: A high speed simulator tool for pipeline A/D converters. SMACD 2016: 1-4 - 2015
- [j13]Naércio Magaia, Nuno Horta, Rui Ferreira Neves, Paulo Rogério Pereira, Miguel Correia:
A multi-objective routing algorithm for Wireless Multimedia Sensor Networks. Appl. Soft Comput. 30: 104-112 (2015) - [j12]António Silva, Rui Ferreira Neves, Nuno Horta:
A hybrid approach to portfolio composition based on fundamental and technical indicators. Expert Syst. Appl. 42(4): 2036-2048 (2015) - [j11]José Matias Pinto, Rui Ferreira Neves, Nuno Horta:
Boosting Trading Strategies performance using VIX indicator together with a dual-objective Evolutionary Computation optimizer. Expert Syst. Appl. 42(19): 6699-6716 (2015) - [j10]Ricardo Martins, Nuno Lourenço, Nuno Horta:
Multi-objective optimization of analog integrated circuit placement hierarchy in absolute coordinates. Expert Syst. Appl. 42(23): 9137-9151 (2015) - [j9]Nuno Lourenço, António Canelas, Ricardo Povoa, Ricardo Martins, Nuno Horta:
Floorplan-aware analog IC sizing and optimization based on topological constraints. Integr. 48: 183-197 (2015) - [c59]Nuno Lourenço, Ricardo Martins, Nuno Horta:
Layout-aware sizing of analog ICs using floorplan & routing estimates for parasitic extraction. DATE 2015: 1156-1161 - [c58]Jaime Machado, Rui Ferreira Neves, Nuno Horta:
Developing Multi-Time Frame Trading Rules with a Trend Following Strategy, using GA. GECCO (Companion) 2015: 765-766 - [c57]Ricardo Martins, Nuno Lourenço, António Canelas, Nuno Horta:
Extraction and application of wiring symmetry rules to route analog multiport terminals. ISCAS 2015: 1945-1948 - [c56]Ricardo Povoa, Nuno Lourenço, Nuno Horta, João Goes:
A voltage-combiners-biased amplifier with enhanced gain and speed using current starving. ISCAS 2015: 2069-2072 - [c55]David Guilherme, João Pereira, Nuno Horta, Jorge Guilherme:
Thermal-aware floorplanning and layout generation of MOSFET power stages. ISCAS 2015: 2269-2272 - 2014
- [j8]Mauro Santos, Nuno Horta, Jorge Guilherme:
A survey on nonlinear analog-to-digital converters. Integr. 47(1): 12-22 (2014) - [j7]Ricardo Martins, Nuno Lourenço, António Canelas, Nuno Horta:
Electromigration-aware analog Router with multilayer multiport terminal structures. Integr. 47(4): 532-547 (2014) - [c54]António Silva, Rui Ferreira Neves, Nuno Horta:
Portfolio optimization using fundamental indicators based on multi-objective EA. CIFEr 2014: 158-165 - [c53]Ricardo Martins, Nuno Lourenço, António Canelas, Nuno Horta:
Electromigration-aware and IR-Drop avoidance routing in analog multiport terminal structures. DATE 2014: 1-6 - [c52]Ricardo Povoa, Nuno Lourenço, Nuno Horta, Rui Santos-Tavares, João Goes:
A cascode-free single-stage amplifier using a fully-differential folded voltage-combiner. ICECS 2014: 263-266 - [c51]Mauro Santos, Nuno Horta, Jorge Guilherme:
Logarithmic AD conversion using latched comparators and a time-to-digital converter. ICECS 2014: 319-322 - [c50]Bruno Silva, Nuno Horta, Jorge Guilherme:
A rad-hard DC-DC converter controller. ICECS 2014: 439-442 - [c49]David Guilherme, Nuno Horta, Jorge Guilherme:
Automatic layout generation of power MOSFET transistors in bulk CMOS. ICECS 2014: 606-609 - [c48]José Matias Pinto, Rui Ferreira Neves, Nuno Horta:
Multi-objective Optimization of Investment Strategies - Based on Evolutionary Computation Techniques, in Volatile Environments. ICEIS (1) 2014: 480-488 - [c47]Ricardo Povoa, Ricardo Lourenco, Nuno Lourenço, António Canelas, Ricardo Martins, Nuno Horta:
LC-VCO automatic synthesis using multi-objective evolutionary techniques. ISCAS 2014: 293-296 - 2013
- [j6]António Canelas, Rui Ferreira Neves, Nuno Horta:
A SAX-GA approach to evolve investment strategies on financial markets based on pattern discovery techniques. Expert Syst. Appl. 40(5): 1579-1590 (2013) - [j5]Ricardo Martins, Nuno Lourenço, Nuno Horta:
LAYGEN II - Automatic Layout Generation of Analog Integrated Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(11): 1641-1654 (2013) - [c46]Frederico Rocha, Nuno Lourenço, Ricardo Povoa, Ricardo Martins, Nuno Horta:
A new metaheuristc combining gradient models with NSGA-II to enhance analog IC synthesis. IEEE Congress on Evolutionary Computation 2013: 2781-2788 - [c45]Ricardo Martins, Nuno Lourenço, António Canelas, Nuno Horta:
Multi-port multi-terminal analog router based on an evolutionary optimization kernel. IEEE Congress on Evolutionary Computation 2013: 2789-2796 - [c44]António Canelas, Rui Ferreira Neves, Nuno Horta:
Multi-dimensional pattern discovery in financial time series using sax-ga with extended robustness. GECCO (Companion) 2013: 179-180 - [c43]Jorge Fonseca, Rui Ferreira Neves, Nuno Horta:
Optimizing investment strategies based on companies earnings using genetic algorithms. GECCO (Companion) 2013: 1731-1732 - [c42]Frederico Rocha, Ricardo Martins, Nuno Lourenço, Nuno Horta:
Enhancing a Layout-Aware Synthesis Methodology for Analog ICs by Embedding Statistical Knowledge into the Evolutionary Optimization Kernel. DoCEIS 2013: 531-538 - [c41]Ricardo Povoa, Nuno Lourenço, Nuno Horta, Rui Santos-Tavares, João Goes:
Single-stage amplifiers with gain enhancement and improved energy-efficiency employing voltage-combiners. VLSI-SoC 2013: 19-22 - 2012
- [c40]António Canelas, Rui Ferreira Neves, Nuno Horta:
A new SAX-GA methodology applied to investment strategies optimization. GECCO 2012: 1055-1062 - [c39]Nuno Lourenço, Nuno Horta:
GENOM-POF: multi-objective evolutionary synthesis of analog ICs with corners validation. GECCO 2012: 1119-1126 - [c38]Ricardo Martins, Nuno Lourenço, Nuno Horta:
LAYGEN II: automatic analog ICs layout generator based on a template approach. GECCO 2012: 1127-1134 - [c37]José Pinto, Nuno Horta:
Automated passive filter design using multi-objective genetic algorithms with variable parameters. GECCO (Companion) 2012: 1531-1532 - [c36]Oleksandr Yefimochkin, Rui Ferreira Neves, Nuno Horta:
An evolutionary approach to define investment strategies based on macroeconomic indicators and VIX data. GECCO (Companion) 2012: 1539-1540 - [c35]Nuno Leite, Rui Ferreira Neves, Nuno Horta, Fernando Melicio, Agostinho C. Rosa:
Solving an Uncapacitated Exam Timetabling Problem Instance using a Hybrid NSGA-II. IJCCI 2012: 106-115 - [c34]Nuno Leite, Rui Ferreira Neves, Nuno Horta, Fernando Melicio, Agostinho C. Rosa:
Solving a Capacitated Exam Timetabling Problem Instance Using a Bi-objective NSGA-II. IJCCI (Selected Papers) 2012: 115-129 - 2011
- [j4]António Gorgulho, Rui Ferreira Neves, Nuno Horta:
Applying a GA kernel on optimizing technical analysis rules for stock picking and portfolio composition. Expert Syst. Appl. 38(11): 14072-14085 (2011) - [c33]Paulo Parracho, Rui Ferreira Neves, Nuno Horta:
Trading with optimized uptrend and downtrend pattern templates using a genetic algorithm kernel. IEEE Congress on Evolutionary Computation 2011: 1895-1901 - [c32]Frederico Cadete, David Guilherme, Jorge Guilherme, Nuno Horta:
Overcurrent detection circuit for integrated class-D amplifiers. ECCTD 2011: 401-404 - [c31]José Pinto, Rui Ferreira Neves, Nuno Horta:
Fitness function evaluation for MA trading strategies based on genetic algorithms. GECCO (Companion) 2011: 819-820 - [c30]Pedro Sousa, Carla Duarte, Manuel F. M. Barros, Jorge Guilherme, Nuno Horta:
Optimal OpAmp sizing based on a fuzzy-genetic kernel. GECCO (Companion) 2011: 827-828 - 2010
- [b1]Manuel F. M. Barros, Jorge M. C. Guilherme, Nuno C. G. Horta:
Analog Circuits and Systems Optimization based on Evolutionary Computation Techniques. Studies in Computational Intelligence 294, Springer 2010, ISBN 978-3-642-12345-0 - [j3]Manuel F. M. Barros, Jorge Guilherme, Nuno Horta:
Analog circuits optimization based on evolutionary computation techniques. Integr. 43(1): 136-155 (2010) - [c29]Paulo Parracho, Rui Ferreira Neves, Nuno Horta:
Trading in financial markets using pattern recognition optimized by genetic algorithms. GECCO (Companion) 2010: 2105-2106 - [c28]Adriano Simões, Rui Ferreira Neves, Nuno Horta:
An Innovative GA Optimized Investment Strategy based on a New Technical Indicator using Multiple MAS. IJCCI (ICEC) 2010: 306-310
2000 – 2009
- 2009
- [j2]Artur Silva, Jorge Guilherme, Nuno Horta:
Reconfigurable multi-mode sigma-delta modulator for 4G mobile terminals. Integr. 42(1): 34-46 (2009) - [c27]Pedro Sousa, Carla Duarte, Manuel F. M. Barros, Jorge Guilherme, Nuno Horta:
Enhancing analog IC design optimization kernels with simple fuzzy models. ECCTD 2009: 775-778 - [c26]Pedro Sousa, Carla Duarte, Nuno Horta:
FUGA: a fuzzy-genetic analog circuit optimization kernel. GECCO 2009: 1779-1780 - [c25]António Gorgulho, Rui Ferreira Neves, Nuno Horta:
Using GAs to balance technical indicators on stock picking for financial portfolio composition. GECCO (Companion) 2009: 2041-2046 - 2008
- [c24]Mauro Santos, Carlos Pires, Jorge Guilherme, Nuno Horta:
Overview of radiation effects and design constraints off fully custom SMPS. APCCAS 2008: 372-375 - [c23]Artur Silva, Nuno Horta, Jorge Guilherme:
A reconfigurable A/D converter for 4G wireless systems. ISCAS 2008: 924-927 - 2007
- [c22]Manuel F. M. Barros, Jorge Guilherme, Nuno Horta:
An evolutionary optimization kernel using a dynamic GA-SVM model applied to analog IC design. ECCTD 2007: 32-35 - [c21]Artur Silva, Nuno Horta, Jorge Guilherme:
Design of a multimode reconfigurable sigma-delta converter for 4G wireless receivers. ECCTD 2007: 132-135 - [c20]Nuno C. Lourenço, Nuno C. G. Horta:
Automatic analog IC layout generation based on a evolutionary computation approach. GECCO 2007: 2261 - [c19]Manuel F. M. Barros, Jorge Guilherme, Nuno Horta:
GA-SVM feasibility model and optimization kernel applied to analog IC design automation. ACM Great Lakes Symposium on VLSI 2007: 469-472 - 2006
- [c18]Manuel F. M. Barros, Jorge Guilherme, Nuno Horta:
GA-SVM Optimization Kernel applied to Analog IC Design Automation. ICECS 2006: 486-489 - [c17]Gonçalo Neves, Manuel F. M. Barros, Nuno Horta:
AIDA: Analog IC Design Automation based on a Fully Configurable Design Hierarchy and Flow. ICECS 2006: 490-493 - 2005
- [c16]João Paulo Carvalho, Nuno Cavaco Gomes Horta, Daniel Chang Yan, Pedro Ramos e Silva:
Fuzzy Chess Tactics. EUSFLAT Conf. 2005: 1033-1038 - [c15]Nuno Lourenço, Nuno Horta:
Laygen - An evolutionary approach to automatic analog IC layout generation. ICECS 2005: 1-4 - 2004
- [c14]Rui Luís, David Simões, Nuno Horta:
A Multi-Level Model for Tracking Analysis in E-Learning Platforms. ICALT 2004 - [c13]David Simões, Rui Luís, Nuno Horta:
Enhancing the SCORM Modelling Scope. ICALT 2004 - [c12]David Simões, Rui Luís, Nuno Horta:
Enhancing the SCORM metadata model. WWW (Alternate Track Papers & Posters) 2004: 238-239 - 2003
- [c11]David Simões, João Redol, Rui Luís, Alberto Carvalho, H. Páscoa, J. Coelho, Paulo Grave, Nuno Horta:
A New Approach towards E-Learning Content Standardization and Enhanced Usability. ICWI 2003: 1199-1203 - [c10]João Redol, David Simões, A. Carvalho, H. Páscoa, J. Coelho, Paulo Grave, Rui Luís, Nuno Horta:
VIANET - A New Web Framework for Distance Learning. ICALT 2003: 258-259 - [c9]Manuel F. M. Barros, João Silva, Gonçalo Neves, Nuno Cavaco Gomes Horta:
Enhanced genetic algorithm kernel applied to a circuit-level optimization E-design environment. ICECS 2003: 1046-1049 - 2002
- [c8]José Iria, Nuno Horta, Agostinho David:
Towards a Framework for Semantic Service Discovery in Ubiquitous P2P Enviroments. International Conference on Internet Computing 2002: 529-535 - [c7]João Silva, Nuno Cavaco Gomes Horta:
GENOM: circuit-level optimizer based on a modified genetic algorithm kernel. ISCAS (1) 2002: 745-748 - 2001
- [c6]Xu Jingnan, João C. Vital, Nuno Horta:
A Skill-based library for retargetable embedded analog cores. DATE 2001: 768-769 - [c5]Xu Jingnan, J. Serras, M. Oliveira, R. Belo, M. Bugalho, João C. Vital, Nuno Horta, José E. Franca:
IC design automation from circuit level optimization to retargetable layout. ICECS 2001: 95-98 - 2000
- [c4]Nuno Horta, Maria Fino, João Goes:
Symbolic techniques applied to switched-current ADCs synthesis. ISCAS 2000: 129-132
1990 – 1999
- 1999
- [c3]José E. Franca, Nuno Horta, M. Pereira, João C. Vital, Rafael Castro-López, Manuel Delgado-Restituto, Francisco V. Fernández, Ángel Rodríguez-Vázquez, J. Ramos, P. Santos:
RAPID-retargetability for reusability of application-driven quadrature D/A interface block design. ICECS 1999: 1679-1683 - 1998
- [c2]Jorge Guilherme, Nuno C. G. Horta, José E. Franca:
Symbolic synthesis of non-linear data converters. ICECS 1998: 219-222 - 1997
- [j1]Nuno C. G. Horta, José E. Franca:
Algorithm-driven synthesis of data conversion architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(10): 1116-1135 (1997) - 1994
- [c1]Nuno C. G. Horta, José E. Franca:
A Methodology for Automatic Generation of Data Conversion Topologies from Algorithms. ISCAS 1994: 371-374
Coauthor Index
Jorge Guilherme
aka: Jorge M. C. Guilherme
aka: Jorge M. C. Guilherme
António Gusmão 0001
aka: António Paiva Lapas de Gusmão
aka: António Paiva Lapas de Gusmão
[j51] [j50] [c98] [c97] [c96] [c95] [j49] [j48] [c94] [c93] [c92] [c91] [c90] [c89] [c88] [j46] [j45] [c87] [b2] [j44] [j42] [j41] [j40] [j39] [j38] [c86] [j36] [j35] [c85] [c84] [c83] [c82] [c80] [c79] [j29] [j27] [j26] [c78] [c75] [c74] [c73] [c72] [j23] [c70] [c69] [c67] [c66] [c65] [j19] [j17] [j16] [j15] [c64] [c63] [c62] [c61] [j10] [j9] [c59] [c57] [c56] [j7] [c53] [c52] [c47] [j5] [c46] [c45] [c42] [c41] [c39] [c38] [c20] [c15]
[j50] [c98] [c97] [c96] [c95] [j49] [j48] [c93] [c92] [c91] [c90] [c89] [c88] [j46] [j45] [c87] [b2] [j44] [j42] [j41] [j40] [j39] [j38] [c86] [j36] [j35] [c85] [c84] [c83] [c82] [c80] [c79] [j29] [j27] [j26] [c78] [c75] [c74] [c73] [c72] [j23] [c70] [c67] [c66] [c65] [j17] [j16] [c64] [c63] [c62] [c61] [j10] [j9] [c59] [c57] [j7] [c53] [c47] [j5] [c46] [c45] [c42] [c38]
Ricardo Povoa
aka: Ricardo Póvoa
aka: Ricardo Póvoa
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