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ORCIDQiang Xu 0001
Person information
- affiliation: Chinese University of Hong Kong, Department of Computer Science and Engineering, Hong Kong
- affiliation (PhD 2005): McMaster University, Hamilton, ON, Canada
Other persons with the same name
- Qiang Xu — disambiguation page
- Qiang Xu 0002
![[0000-0002-5903-9781]](https://dblp.org/img/orcid-mark.12x12.png "0000-0002-5903-9781")
— University of Huddersfield, School of Computing and Engineering, UK (and 4 more) - Qiang Xu 0003 — Lamar University, Dan F. Smith Department of Chemical Engineering, Beaumont, TX, USA
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2020 – today
- 2020
[j21]Qian Zhang, Qiang Xu:
ApproxIt: A Quality Management Framework of Approximate Computing for Iterative Methods. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(5): 991-1002 (2020)- [c110]Yu Li, Min Li, Bo Luo, Ye Tian, Qiang Xu:
DeepDyve: Dynamic Verification for Deep Neural Networks. CCS 2020: 101-112 - [c109]Bo Luo, Min Li, Yu Li, Qiang Xu:
On Configurable Defense against Adversarial Example Attacks. ACM Great Lakes Symposium on VLSI 2020: 543-548 - [i7]Yu Li, Min Li, Bo Luo, Ye Tian, Qiang Xu:
DeepDyve: Dynamic Verification for Deep Neural Networks. CoRR abs/2009.09663 (2020)
2010 – 2019
- 2019
- [j20]Li Jiang, Zhuoran Song, Haiyue Song, Chengwen Xu, Qiang Xu, Naifeng Jing, Weifeng Zhang, Xiaoyao Liang:
Energy-Efficient and Quality-Assured Approximate Computing Framework Using a Co-Training Method. ACM Trans. Design Autom. Electr. Syst. 24(6): 59:1-59:25 (2019) - [c108]Yu Li, Yannan Liu, Min Li, Ye Tian, Bo Luo, Qiang Xu:
D2NN: a fine-grained dual modular redundancy framework for deep neural networks. ACSAC 2019: 138-147 - [c107]Bo Luo, Yu Li, Lingxiao Wei, Qiang Xu:
On Functional Test Generation for Deep Neural Network IPs. DATE 2019: 1010-1015 - [c106]Ye Tian, Min Li, Qiang Xu:
Lightweight prediction based big/little design for efficient neural network inference. SEC 2019: 356 - [i6]Bo Luo, Yu Li, Lingxiao Wei, Qiang Xu:
On Functional Test Generation for Deep Neural Network IPs. CoRR abs/1911.11550 (2019) - [i5]Bo Luo, Qiang Xu:
Region-Wise Attack: On Efficient Generation of Robust Physical Adversarial Examples. CoRR abs/1912.02598 (2019) - 2018
- [j19]Qiang Han, Qiang Xu, Wen-Ben Jone:
SERA: statistical error rate analysis for profit-oriented performance binning of resilient circuits. Integr. 60: 1-12 (2018) - [j18]Xiaoming Chen, Qiaoyi Liu, Song Yao, Jia Wang, Qiang Xu, Yu Wang, Yongpan Liu, Huazhong Yang:
Hardware Trojan Detection in Third-Party Digital Intellectual Property Cores by Multilevel Feature Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(7): 1370-1383 (2018) - [c105]Bo Luo, Yannan Liu, Lingxiao Wei, Qiang Xu:
Towards Imperceptible and Robust Adversarial Example Attacks Against Neural Networks. AAAI 2018: 1652-1659 - [c104]Lingxiao Wei, Bo Luo, Yu Li, Yannan Liu, Qiang Xu:
I Know What You See: Power Side-Channel Attack on Convolutional Neural Network Accelerators. ACSAC 2018: 393-406 - [c103]Ye Tian, Qian Zhang, Ting Wang, Qiang Xu:
Lookup table allocation for approximate computing with memory under quality constraints. DATE 2018: 153-158 - [c102]Haiyue Song, Chengwen Xu, Qiang Xu, Zhuoran Song, Naifeng Jing, Xiaoyao Liang, Li Jiang:
Invocation-driven neural approximate computing with a multiclass-classifier and multiple approximators. ICCAD 2018: 50 - [c101]Xian Zhang, Guangyu Sun, Peichen Xie, Chao Zhang, Yannan Liu, Lingxiao Wei, Qiang Xu, Chun Jason Xue:
Shadow Block: Accelerating ORAM Accesses with Data Duplication. MICRO 2018: 961-973 - [i4]Bo Luo, Yannan Liu, Lingxiao Wei, Qiang Xu:
Towards Imperceptible and Robust Adversarial Example Attacks against Neural Networks. CoRR abs/1801.04693 (2018) - [i3]Lingxiao Wei, Yannan Liu, Bo Luo, Yu Li, Qiang Xu:
I Know What You See: Power Side-Channel Attack on Convolutional Neural Network Accelerators. CoRR abs/1803.05847 (2018) - [i2]Haiyue Song, Chengwen Xu, Qiang Xu, Zhuoran Song, Naifeng Jing, Xiaoyao Liang, Li Jiang:
Invocation-driven Neural Approximate Computing with a Multiclass-Classifier and Multiple Approximators. CoRR abs/1810.08379 (2018) - [i1]Bo Luo, Min Li, Yu Li, Qiang Xu:
On Configurable Defense against Adversarial Example Attacks. CoRR abs/1812.02737 (2018) - 2017
- [c100]Ye Tian, Qiang Xu, Jason Xue:
On efficient message passing in energy harvesting based distributed system. ASP-DAC 2017: 139-144 - [c99]Qian Zhang, Ting Wang, Qiang Xu:
On resilient task allocation and scheduling with uncertain quality checkers. ASP-DAC 2017: 408-413 - [c98]Chengwen Xu, Xiangyu Wu, Wenqi Yin, Qiang Xu, Naifeng Jing, Xiaoyao Liang, Li Jiang:
On Quality Trade-off Control for Approximate Computing Using Iterative Training. DAC 2017: 52:1-52:6 - [c97]Ting Wang, Qian Zhang, Qiang Xu:
ApproxQA: A unified quality assurance framework for approximate computing. DATE 2017: 254-257 - [c96]Ting Wang, Yannan Liu, Qiang Xu, Zhaobo Zhang, Zhiyuan Wang, Xinli Gu:
RetroDMR: Troubleshooting non-deterministic faults with retrospective DMR. DATE 2017: 638-641 - [c95]Yannan Liu, Lingxiao Wei, Bo Luo, Qiang Xu:
Fault injection attack on deep neural network. ICCAD 2017: 131-138 - [c94]Ye Tian, Ting Wang, Qian Zhang, Qiang Xu:
ApproxLUT: A novel approximate lookup table-based accelerator. ICCAD 2017: 438-443 - [c93]Xiaoming Chen, Qiaoyi Liu, Yu Wang, Qiang Xu, Huazhong Yang:
Low-overhead implementation of logic encryption using gate replacement techniques. ISQED 2017: 257-263 - 2016
- [j17]Tianjian Li, Feng Xie, Xiaoyao Liang, Qiang Xu, Krishnendu Chakrabarty, Naifeng Jing, Li Jiang:
A Novel Test Method for Metallic CNTs in CNFET-Based SRAMs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(7): 1192-1205 (2016) - [c92]Juan Yi, Qian Zhang, Ye Tian, Ting Wang, Weichen Liu, Edwin Hsing-Mean Sha, Qiang Xu:
ApproxMap: On task allocation and scheduling for resilient applications. ASP-DAC 2016: 318-323 - [c91]Yannan Liu, Lingxiao Wei, Zhe Zhou, Kehuan Zhang, Wenyuan Xu, Qiang Xu:
On Code Execution Tracking via Power Side-Channel. CCS 2016: 1019-1031 - [c90]Ting Wang, Qian Zhang, Nam Sung Kim, Qiang Xu:
On Effective and Efficient Quality Management for Approximate Computing. ISLPED 2016: 156-161 - [c89]Tianjian Li, Li Jiang, Xiaoyao Liang, Qiang Xu, Krishnendu Chakrabarty:
Defect tolerance for CNFET-based SRAMs. ITC 2016: 1-9 - 2015
- [j16]Jie Zhang, Feng Yuan, Lingxiao Wei, Yannan Liu, Qiang Xu:
VeriTrust: Verification for Hardware Trust. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(7): 1148-1161 (2015) - [j15]Xiaolong Zhang, Huiyun Li, Li Jiang, Qiang Xu:
A Low-Cost TSV Test and Diagnosis Scheme Based on Binary Search Method. IEEE Trans. Very Large Scale Integr. Syst. 23(11): 2639-2647 (2015) - [c88]Zelong Sun, Li Jiang, Qiang Xu, Zhaobo Zhang, Zhiyuan Wang, Xinli Gu:
On test syndrome merging for reasoning-based board-level functional fault diagnosis. ASP-DAC 2015: 737-742 - [c87]Lingxiao Wei, Jie Zhang, Feng Yuan, Yannan Liu, Junfeng Fan, Qiang Xu:
Vulnerability analysis for crypto devices against probing attack. ASP-DAC 2015: 827-832 - [c86]Feng Xie, Xiaoyao Liang, Qiang Xu, Krishnendu Chakrabarty, Naifeng Jing, Li Jiang:
Jump test for metallic CNTs in CNFET-based SRAM. DAC 2015: 16:1-16:6 - [c85]Yannan Liu, Jie Zhang, Lingxiao Wei, Feng Yuan, Qiang Xu:
DERA: yet another differential fault attack on cryptographic devices based on error rate analysis. DAC 2015: 31:1-31:6 - [c84]Rong Ye, Feng Yuan, Jie Zhang, Qiang Xu:
On the premises and prospects of timing speculation. DATE 2015: 605-608 - [c83]Qian Zhang, Ting Wang, Ye Tian, Feng Yuan, Qiang Xu:
ApproxANN: an approximate computing framework for artificial neural network. DATE 2015: 701-706 - [c82]Ye Tian, Qian Zhang, Ting Wang, Feng Yuan, Qiang Xu:
ApproxMA: Approximate Memory Access for Dynamic Precision Scaling. ACM Great Lakes Symposium on VLSI 2015: 337-342 - [c81]Lingxiao Wei, Chaosheng Song, Yannan Liu, Jie Zhang, Feng Yuan, Qiang Xu:
BoardPUF: Physical Unclonable Functions for Printed Circuit Board Authentication. ICCAD 2015: 152-158 - [c80]Qian Zhang, Ye Tian, Ting Wang, Feng Yuan, Qiang Xu:
ApproxEigen: An Approximate Computing Technique for Large-Scale Eigen-Decomposition. ICCAD 2015: 824-830 - [c79]Li Jiang, Xiangwei Huang, Hongfeng Xie, Qiang Xu, Chao Li, Xiaoyao Liang, Huiyun Li:
A novel TSV probing technique with adhesive test interposer. ICCD 2015: 597-604 - [c78]Qiang Han, Jianghao Guo, Qiang Xu, Wen-Ben Jone:
On Resilient System Performance Binning. ISPD 2015: 119-125 - [c77]Li Jiang, Pu Pang, Naifeng Jing, Sung Kyu Lim, Xiaoyao Liang, Qiang Xu:
On diagnosable and tunable 3D clock network design for lifetime reliability enhancement. ITC 2015: 1-10 - [c76]Li Jiang, Qiang Xu:
Yield and reliability enhancement for 3D ICs: Dissertation summary: IEEE TTTC E.J. McCluskey doctoral thesis award competition finalist. ITC 2015: 1-11 - [c75]Song Yao, Xiaoming Chen, Jie Zhang, Qiaoyi Liu, Jia Wang, Qiang Xu, Yu Wang, Huazhong Yang:
FASTrust: Feature analysis for third-party IP trust verification. ITC 2015: 1-10 - [c74]Li Jiang, Qiang Xu:
Fault-Tolerant 3D-NoC Architecture and Design: Recent Advances and Challenges. NOCS 2015: 7:1-7:8 - 2014
- [b1]Xiao Liu, Qiang Xu:
Trace-Based Post-Silicon Validation for VLSI Circuits. Lecture Notes in Electrical Engineering 252, Springer 2014, ISBN 978-3-319-00532-4, pp. 1-102 - [j14]Rong Ye, Qiang Xu:
Learning-Based Power Management for Multicore Processors via Idle Period Manipulation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(7): 1043-1055 (2014) - [c73]Jie Zhang, Feng Yuan, Qiang Xu:
DeTrust: Defeating Hardware Trust Verification with Stealthy Implicitly-Triggered Hardware Trojans. CCS 2014: 153-166 - [c72]Qian Zhang, Feng Yuan, Rong Ye, Qiang Xu:
ApproxIt: An Approximate Computing Framework for Iterative Methods. DAC 2014: 97:1-97:6 - [c71]Ting Wang, Qiang Xu:
On the Simulation of NBTI-Induced Performance Degradation Considering Arbitrary Temperature and Voltage Variations. DAC 2014: 169:1-169:6 - [c70]Qian Zhang, Chenfei Ma, Qiang Xu:
On hybrid memory allocation for FPGA behavioral synthesis (abstract only). FPGA 2014: 245 - [c69]Jie Zhang, Guantong Su, Yannan Liu, Lingxiao Wei, Feng Yuan, Guoqiang Bai, Qiang Xu:
On trojan side channel design and identification. ICCAD 2014: 278-285 - [c68]Fuyang Huang, Zelong Sun, Qiang Xu, Felix Yim Binh Sze, Tang Wai Lan, Xiaogang Wang:
Real-time sign language recognition using RGBD stream: spatial-temporal feature exploration. SUI 2014: 149 - 2013
- [j13]Li Jiang, Qiang Xu, Bill Eklow:
On Effective Through-Silicon Via Repair for 3-D-Stacked ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(4): 559-571 (2013) - [j12]Xiao Liu, Qiang Xu:
On Multiplexed Signal Tracing for Post-Silicon Validation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(5): 748-759 (2013) - [c67]Feng Yuan, Yannan Liu, Wen-Ben Jone, Qiang Xu:
On testing timing-speculative circuits. DAC 2013: 30:1-30:6 - [c66]Jie Zhang, Feng Yuan, Lingxiao Wei, Zelong Sun, Qiang Xu:
VeriTrust: verification for hardware trust. DAC 2013: 61:1-61:8 - [c65]Li Jiang, Fangming Ye, Qiang Xu, Krishnendu Chakrabarty, Bill Eklow:
On effective and efficient in-field TSV repair for stacked 3D ICs. DAC 2013: 74:1-74:6 - [c64]Rong Ye, Feng Yuan, Zelong Sun, Wen-Ben Jone, Qiang Xu:
Post-placement voltage island generation for timing-speculative circuits. DAC 2013: 112:1-112:6 - [c63]Feng Yuan, Qiang Xu:
InTimeFix: a low-cost and scalable technique for in-situ timing error masking in logic circuits. DAC 2013: 183:1-183:6 - [c62]Yuxi Liu, Rong Ye, Feng Yuan, Qiang Xu:
Optimization for timing-speculated circuits by redundancy addition and removal. ETS 2013: 1-6 - [c61]Jie Zhang, Qiang Xu:
On hardware Trojan design and implementation at register-transfer level. HOST 2013: 107-112 - [c60]Rong Ye, Ting Wang, Feng Yuan, Rakesh Kumar, Qiang Xu:
On reconfiguration-oriented approximate adder design and its application. ICCAD 2013: 48-54 - [c59]Jie Zhang, Feng Yuan, Rong Ye, Qiang Xu:
ForTER: a forward error correction scheme for timing error resilience. ICCAD 2013: 55-60 - [c58]Yinhe Han, Song Jin, Jibing Qiu, Qiang Xu, Xiaowei Li:
On predicting NBTI-induced circuit aging by isolating leakage change. ISQED 2013: 46-52 - [c57]Zelong Sun, Li Jiang, Qiang Xu, Zhaobo Zhang, Zhiyuan Wang, Xinli Gu:
AgentDiag: An agent-assisted diagnostic framework for board-level functional failures. ITC 2013: 1-8 - [c56]Qiang Han, Jianghao Guo, Wen-Ben Jone, Qiang Xu:
Path delay testing in resilient system. MWSCAS 2013: 645-648 - 2012
- [j11]Xiao Liu, Qiang Xu:
On Signal Selection for Visibility Enhancement in Trace-Based Post-Silicon Validation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(8): 1263-1274 (2012) - [j10]Xiao Liu, Qiang Xu:
On X-Variable Filling and Flipping for Capture-Power Reduction in Linear Decompressor-Based Test Compression Environment. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(11): 1743-1753 (2012) - [j9]Li Jiang, Qiang Xu, Krishnendu Chakrabarty, T. M. Mak:
Integrated Test-Architecture Optimization and Thermal-Aware Test Scheduling for 3-D SoCs Under Pre-Bond Test-Pin-Count Constraint. IEEE Trans. Very Large Scale Integr. Syst. 20(9): 1621-1633 (2012) - [c55]Rong Ye, Qiang Xu:
Learning-based power management for multi-core processors via idle period manipulation. ASP-DAC 2012: 115-120 - [c54]Yubin Zhang, Haile Yu, Qiang Xu:
CODA: A concurrent online delay measurement architecture for critical paths. ASP-DAC 2012: 169-174 - [c53]Qiang Xu, Li Jiang, Huiyun Li, Bill Eklow:
Yield enhancement for 3D-stacked ICs: Recent advances and challenges. ASP-DAC 2012: 731-737 - [c52]Feng Yuan, Xiao Liu, Qiang Xu:
X-tracer: a reconfigurable X-tolerant trace compressor for silicon debug. DAC 2012: 555-560 - [c51]Li Jiang, Qiang Xu, Bill Eklow:
On effective TSV repair for 3D-stacked ICs. DATE 2012: 793-798 - [c50]Rong Ye, Feng Yuan, Hai Zhou, Qiang Xu:
Clock skew scheduling for timing speculation. DATE 2012: 929-934 - [c49]Jie Zhang, Haile Yu, Qiang Xu:
HTOutlier: Hardware Trojan detection with side-channel signature outlier identification. HOST 2012: 55-58 - [c48]Yuxi Liu, Rong Ye, Feng Yuan, Rakesh Kumar, Qiang Xu:
On logic synthesis for timing speculation. ICCAD 2012: 591-596 - [c47]Xiao Liu, Qiang Xu:
On efficient silicon debug with flexible trace interconnection fabric. ITC 2012: 1-9 - [c46]Yuxi Liu, Qiang Xu:
On modeling faults in FinFET logic circuits. ITC 2012: 1-9 - 2011
- [j8]Jia Li, Xiao Liu, Yubin Zhang, Yu Hu, Xiaowei Li, Qiang Xu:
Capture-power-aware test data compression using selective encoding. Integr. 44(3): 205-216 (2011) - [j7]Lin Huang, Feng Yuan, Qiang Xu:
On Task Allocation and Scheduling for Lifetime Extension of Platform-Based MPSoC Designs. IEEE Trans. Parallel Distributed Syst. 22(12): 2088-2099 (2011) - [c45]Jia Li, Qiang Xu, Dong Xiang:
Compression-aware capture power reduction for at-speed testing. ASP-DAC 2011: 806-811 - [c44]Peter Marwedel, Jürgen Teich, Georgia Kouveli, Iuliana Bacivarov, Lothar Thiele, Soonhoi Ha, Chanhee Lee, Qiang Xu, Lin Huang:
Mapping of applications to MPSoCs. CODES+ISSS 2011: 109-118 - [c43]Yuxi Liu, Feng Yuan, Qiang Xu:
Re-synthesis for cost-efficient circuit-level timing speculation. DAC 2011: 158-163 - [c42]Lin Huang, Rong Ye, Qiang Xu:
Customer-aware task allocation and scheduling for multi-mode MPSoCs. DAC 2011: 387-392 - [c41]Xiao Liu, Qiang Xu:
On multiplexed signal tracing for post-silicon debug. DATE 2011: 685-690 - [c40]Feng Yuan, Xiao Liu, Qiang Xu:
On High-Quality Test Pattern Selection and Manipulation. ETS 2011: 218 - [c39]Feng Yuan, Xiao Liu, Qiang Xu:
Pseudo-functional testing for small delay defects considering power supply noise effects. ICCAD 2011: 34-39 - [c38]Rong Ye, Feng Yuan, Qiang Xu:
Online clock skew tuning for timing speculation. ICCAD 2011: 442-447 - 2010
- [j6]Lin Huang, Qiang Xu:
Economic Analysis of Testing Homogeneous Manycore Chips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29(8): 1257-1270 (2010) - [j5]Lin Huang, Qiang Xu:
Lifetime Reliability for Load-Sharing Redundant Systems With Arbitrary Failure Distributions. IEEE Trans. Reliab. 59(2): 319-330 (2010) - [j4]Jia Li, Qiang Xu, Yu Hu, Xiaowei Li:
X-Filling for Simultaneous Shift- and Capture-Power Reduction in At-Speed Scan-Based Testing. IEEE Trans. Very Large Scale Integr. Syst. 18(7): 1081-1092 (2010) - [c37]Qiang Xu, Xiao Liu:
On signal tracing in post-silicon validation. ASP-DAC 2010: 262-267 - [c36]Xiao Liu, Qiang Xu:
On Signal Tracing for Debugging Speedpath-Related Electrical Errors in Post-Silicon Validation. Asian Test Symposium 2010: 243-248 - [c35]Lin Huang, Qiang Xu:
Performance yield-driven task allocation and scheduling for MPSoCs under process variation. DAC 2010: 326-331 - [c34]Lin Huang, Qiang Xu:
AgeSim: A simulation framework for evaluating the lifetime reliability of processor-based SoCs. DATE 2010: 51-56 - [c33]Xiao Liu, Yubin Zhang, Feng Yuan, Qiang Xu:
Layout-aware pseudo-functional testing for critical paths considering power supply noise effects. DATE 2010: 1432-1437 - [c32]Lin Huang, Qiang Xu:
Energy-efficient task allocation and scheduling for multi-mode MPSoCs under lifetime reliability constraint. DATE 2010: 1584-1589 - [c31]Li Jiang, Rong Ye, Qiang Xu:
Yield enhancement for 3D-stacked memory by redundancy sharing across dies. ICCAD 2010: 230-234 - [c30]Feng Yuan, Qiang Xu:
On timing-independent false path identification. ICCAD 2010: 532-535 - [c29]Lin Huang, Qiang Xu:
Characterizing the lifetime reliability of manycore processors with core-level redundancy. ICCAD 2010: 680-685 - [c28]Li Jiang, Yuxi Liu, Lian Duan, Yuan Xie, Qiang Xu:
Modeling TSV open defects in 3D-stacked DRAM. ITC 2010: 174-182
2000 – 2009
- 2009
- [j3]Qiang Xu, Yubin Zhang, Krishnendu Chakrabarty:
SOC test-architecture optimization for the testing of embedded cores and signal-integrity faults on core-external interconnects. ACM Trans. Design Autom. Electr. Syst. 14(1): 4:1-4:27 (2009) - [j2]Lei Zhang, Yinhe Han, Qiang Xu, Xiaowei Li, Huawei Li:
On Topology Reconfiguration for Defect-Tolerant NoC-Based Homogeneous Manycore Systems. IEEE Trans. Very Large Scale Integr. Syst. 17(9): 1173-1186 (2009) - [c27]Yubin Zhang, Lin Huang, Feng Yuan, Qiang Xu:
Test Pattern Selection for Potentially Harmful Open Defects in Power Distribution Networks. Asian Test Symposium 2009: 456-461 - [c26]Xiao Liu, Qiang Xu:
Interconnection fabric design for tracing signals in post-silicon validation. DAC 2009: 352-357 - [c25]Feng Yuan, Qiang Xu:
On systematic illegal state identification for pseudo-functional testing. DAC 2009: 702-707 - [c24]Lin Huang, Feng Yuan, Qiang Xu:
Lifetime reliability-aware task allocation and scheduling for MPSoC platforms. DATE 2009: 51-56 - [c23]Li Jiang, Lin Huang, Qiang Xu:
Test architecture design and optimization for three-dimensional SoCs. DATE 2009: 220-225 - [c22]Xiao Liu, Qiang Xu:
Trace signal selection for visibility enhancement in post-silicon validation. DATE 2009: 1338-1343 - [c21]Xiao Liu, Qiang Xu:
A generic framework for scan capture power reduction in fixed-length symbol-based test compression environment. DATE 2009: 1494-1499 - [c20]Li Jiang, Qiang Xu, Krishnendu Chakrabarty, T. M. Mak:
Layout-driven test-architecture design and optimization for 3D SoCs under pre-bond test-pin-count constraint. ICCAD 2009: 191-196 - [c19]Lin Huang, Qiang Xu:
Test economics for homogeneous manycore systems. ITC 2009: 1-10 - [c18]Xiao Liu, Qiang Xu:
On simultaneous shift- and capture-power reduction in linear decompressor-based test compression environment. ITC 2009: 1-10 - [c17]Xiao Liu, Qiang Xu:
Trace signal selection for debugging electrical errors in post-silicon validation. ITC 2009: 1 - [c16]Feng Yuan, Qiang Xu:
Compression-aware pseudo-functional testing. ITC 2009: 1-10 - 2008
- [c15]Jia Li, Qiang Xu, Yu Hu, Xiaowei Li:
On reducing both shift and capture power for scan-based testing. ASP-DAC 2008: 653-658 - [c14]Xiao Liu, Qiang Xu:
On Reusing Test Access Mechanisms for Debug Data Transfer in SoC Post-Silicon Validation. ATS 2008: 303-308 - [c13]Lin Huang, Feng Yuan, Qiang Xu:
On reliable modular testing with vulnerable test access mechanisms. DAC 2008: 834-839 - [c12]Feng Yuan, Lin Huang, Qiang Xu:
Re-Examining the Use of Network-on-Chip as Test Access Mechanism. DATE 2008: 808-811 - [c11]Lei Zhang, Yinhe Han, Qiang Xu, Xiaowei Li:
Defect Tolerance in Homogeneous Manycore Processors Using Core-Level Redundancy with Unified Topology. DATE 2008: 891-896 - [c10]Jia Li, Qiang Xu, Yu Hu, Xiaowei Li:
iFill: An Impact-Oriented X-Filling Method for Shift- and Capture-Power Reduction in At-Speed Scan-Based Testing. DATE 2008: 1184-1189 - [c9]