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ORCIDRavi Varadarajan
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2020 – today
- 2024
[j10]Andrew B. Kahng
, Ravi Varadarajan, Zhiang Wang:
Hier-RTLMP: A Hierarchical Automatic Macro Placer for Large-Scale Complex IP Blocks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(5): 1552-1565 (2024)- 2023
- [i1]Andrew B. Kahng, Ravi Varadarajan, Zhiang Wang:
Hier-RTLMP: A Hierarchical Automatic Macro Placer for Large-scale Complex IP Blocks. CoRR abs/2304.11761 (2023) - 2022
- [c21]Jinwook Jung, Andrew B. Kahng, Ravi Varadarajan, Zhiang Wang:
IEEE CEDA DATC: Expanding Research Foundations for IC Physical Design and ML-Enabled EDA. ICCAD 2022: 96:1-96:8 - [c20]Andrew B. Kahng, Ravi Varadarajan, Zhiang Wang:
RTL-MP: Toward Practical, Human-Quality Chip Planning and Macro Placement. ISPD 2022: 3-11 - 2021
- [c19]Jianli Chen, Iris Hui-Ru Jiang, Jinwook Jung, Andrew B. Kahng, Seungwon Kim, Victor N. Kravets, Yih-Lang Li, Ravi Varadarajan, Mingyu Woo:
DATC RDF-2021: Design Flow and Beyond ICCAD Special Session Paper. ICCAD 2021: 1-6 - [c18]Hadi Esmaeilzadeh, Soroush Ghodrati, Jie Gu, Shiyu Guo, Andrew B. Kahng, Joon Kyung Kim, Sean Kinzer, Rohan Mahapatra, Susmita Dey Manasi, Edwin Mascarenhas, Sachin S. Sapatnekar, Ravi Varadarajan, Zhiang Wang, Hanyang Xu, Brahmendra Reddy Yatham, Ziqing Zeng:
VeriGOOD-ML: An Open-Source Flow for Automated ML Hardware Synthesis. ICCAD 2021: 1-7 - [c17]Jinwook Jung, Andrew B. Kahng, Seungwon Kim, Ravi Varadarajan:
METRICS2.1 and Flow Tuning in the IEEE CEDA Robust Design Flow and OpenROAD ICCAD Special Session Paper. ICCAD 2021: 1-9
2010 – 2019
- 2014
- [j9]Prashant Agrawal, Dragomir Milojevic, Praveen Raghavan, Francky Catthoor, Liesbet Van der Perre, Eric Beyne, Ravi Varadarajan:
System Level Comparison of 3D Integration Technologies for Future Mobile MPSoC Platform. IEEE Embed. Syst. Lett. 6(4): 85-88 (2014)
2000 – 2009
- 2003
- [c16]Ravi Varadarajan:
Convergence of placement technology in physical synthesis: is placement really a point tool? ISPD 2003: 7
1990 – 1999
- 1998
- [c15]Cyrus Bamji, Ravi Varadarajan:
Incremental Autojogging using Range Spaces. VLSI Design 1998: 265- - 1997
- [c14]Srinivasa Rao Arikati, Ravi Varadarajan:
A signature based approach to regularity extraction. ICCAD 1997: 542-545 - 1994
- [j8]Sharma Chakravarthy, Jaykumar Muthuraj, Ravi Varadarajan, Shamkant B. Navathe:
An Objective Function for Vertically Partitioning Relations in Distributed Databases and its Analysis. Distributed Parallel Databases 2(2): 183-207 (1994) - [c13]Ravi Varadarajan, Injae Hwang:
An efficient dynamic load balancing algorithm for adaptive mesh refinement. SAC 1994: 467-472 - [c12]Ravi Varadarajan, Injae Hwang:
An efficient dynamic processor allocation algorithm for adaptive mesh applications. SPDP 1994: 38-45 - 1993
- [j7]Ravi Varadarajan, Bhavani Ravichandran:
Refinement based techniques for mapping nested loop algorithms onto linear systolic arrays. Integr. 14(3): 249-277 (1993) - [c11]Cyrus Bamji, Ravi Varadarajan:
MSTC: A Method for Identifying Overconstraints during Hierarchical Compaction. DAC 1993: 389-394 - [c10]Jaykumar Muthuraj, Sharma Chakravarthy, Ravi Varadarajan, Shamkant B. Navathe:
A Formal Approach to the Vertical Partitioning Problem in Distributed Database Design. PDIS 1993: 26-34 - [p1]Ravi Varadarajan:
6 Algorithms and complexity for markov processes. Computational Statistics 1993: 169-200 - 1992
- [j6]Pedro I. Rivera-Vega, Ravi Varadarajan, Shamkant B. Navathe:
Scheduling file transfers in fully connected networks. Networks 22(6): 563-588 (1992) - [c9]Cyrus Bamji, Ravi Varadarajan:
Hierarchical Pitchmatching Compaction Using Minimum Design. DAC 1992: 311-317 - [c8]Ravi Varadarajan, Cyrus Bamji:
Cloning techniques for hierarchical compaction. ICCAD 1992: 158-161 - [c7]Francis P. Augustine, Ravi Varadarajan:
Efficient Mappings for Multi-dimensional Systolic Arrays Using Flexible Buffer Structures. ICPP (1) 1992: 224-227 - 1991
- [j5]Ravi Varadarajan:
Embedding Shuffle Networks in Hypercubes. J. Parallel Distributed Comput. 11(3): 252-256 (1991) - [j4]Keith W. Ross, Ravi Varadarajan:
Multichain Markov Decision Processes with a Sample Path Constraint: A Decomposition Approach. Math. Oper. Res. 16(1): 195-207 (1991) - [j3]Ravi Varadarajan:
An optimal algorithm for 2 × n bottleneck transportation problems. Oper. Res. Lett. 10(9): 525-529 (1991) - [c6]Ravi Varadarajan, Bhavani Ravichandran:
Refinement based algorithm mapping techniques for linear systolic arrays. Algorithms and Parallel VLSI Architectures 1991: 175-180 - [c5]Injae Hwang, Ravi Varadarajan:
Solving a Load Balancing Problem Using Boltzmann Machines. ICPP (3) 1991: 91-94 - [c4]Ravi Varadarajan, Bhavani Ravichandran:
Refining Algorithm Mappings for Linear Systolic Arrays. IPPS 1991: 151-154 - 1990
- [j2]Ravi Varadarajan:
Partitioning Multi-Edge Graphs. BIT 30(3): 450-463 (1990) - [c3]Chi-Yuan Lo, Ravi Varadarajan:
An O(n1.5logn) 1-d Compaction Algorithm. DAC 1990: 382-387 - [c2]Pedro I. Rivera-Vega, Ravi Varadarajan, Shamkant B. Navathe:
Scheduling Data Redistribution in Distributed Databases. ICDE 1990: 166-173
1980 – 1989
- 1989
- [j1]Keith W. Ross, Ravi Varadarajan:
Markov Decision Processes with Sample Path Constraints: The Communicating Case. Oper. Res. 37(5): 780-790 (1989) - 1988
- [c1]Ravi Varadarajan:
An Approximate Load Balancing Model with Resource Migration in Distributed Systems. ICPP (1) 1988: 13-17
Coauthor Index
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