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Kailash Chandra Ray
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2020 – today
- 2024
- [j33]Vivek Singh
, Kailash Chandra Ray
, Somanath Tripathy
:
An Efficient Method and Hardware System for Monitoring of Illegal Logging Events in Forest. IEEE Syst. J. 18(1): 40-50 (2024) - 2023
- [j32]Pritiranjan Khatua
, Kailash Chandra Ray:
VLSI Architecture of Modified Complex Harmonic Wavelet Transform. Circuits Syst. Signal Process. 42(12): 7297-7314 (2023) - [j31]Satyam Shukla, Punyesh Kumar Jha, Kailash Chandra Ray:
An energy-efficient single-cycle RV32I microprocessor for edge computing applications. Integr. 88: 233-240 (2023) - [j30]Satyam Shukla
, Utkarsh
, Md Azam, Kailash Chandra Ray
:
An Efficient Fault-Tolerant Instruction Decoder for RISC-V Based Dual-Core Soft-Processors. IEEE Trans. Circuits Syst. I Regul. Pap. 70(12): 4816-4825 (2023) - [j29]Pritiranjan Khatua
, Kailash Chandra Ray
:
VLSI Architecture of DCT-Based Harmonic Wavelet Transform for Time-Frequency Analysis. IEEE Trans. Instrum. Meas. 72: 1-8 (2023) - 2022
- [j28]Satyam Shukla
, Kailash Chandra Ray
:
A Low-Overhead Reconfigurable RISC-V Quad-Core Processor Architecture for Fault-Tolerant Applications. IEEE Access 10: 44136-44146 (2022) - [j27]Pritiranjan Khatua
, Kailash Chandra Ray:
A Low Computational Complexity Modified Complex Harmonic Wavelet Transform. Circuits Syst. Signal Process. 41(11): 6462-6483 (2022) - [j26]Garima Sahu
, Kailash Chandra Ray
:
An Efficient Method for Detection and Localization of Myocardial Infarction. IEEE Trans. Instrum. Meas. 71: 1-12 (2022) - [j25]Pritiranjan Khatua
, Kailash Chandra Ray
:
An Efficient DCT-II Based Harmonic Wavelet Transform for Time-Frequency Analysis. J. Signal Process. Syst. 94(12): 1381-1394 (2022) - [c12]Garima Sahu, Akanksha Gupta, Kailash Chandra Ray:
An Efficient Signal Processing Technique for Automated Cardiovascular Disease Detection. iSES 2022: 208-212 - 2021
- [j24]Rakesh Palisetty
, Amit Kumar Panda
, Kailash Chandra Ray
:
ASIC Implementation of Low PAPR Multidevice Variable-Rate Architecture for IEEE 802.11ah. IEEE Trans. Instrum. Meas. 70: 1-10 (2021) - 2020
- [j23]Rakesh Palisetty
, Kailash Chandra Ray
:
Multiuser Variable Rate GO-OFDMA Architecture and Its FPGA Prototype. IEEE Syst. J. 14(2): 2455-2463 (2020) - [j22]Amit Kumar Panda
, Rakesh Palisetty
, Kailash Chandra Ray
:
High-Speed Area-Efficient VLSI Architecture of Three-Operand Binary Adder. IEEE Trans. Circuits Syst. 67-I(11): 3944-3953 (2020) - [j21]Amit Kumar Panda
, Kailash Chandra Ray
:
A Coupled Variable Input LCG Method and its VLSI Architecture for Pseudorandom Bit Generation. IEEE Trans. Instrum. Meas. 69(4): 1011-1019 (2020)
2010 – 2019
- 2019
- [j20]Amit Kumar Panda
, Kailash Chandra Ray:
Modified Dual-CLCG Method and its VLSI Architecture for Pseudorandom Bit Generation. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(3): 989-1002 (2019) - [j19]Kailash Chandra Ray
, Anindya Sundar Dhar:
CORDIC-Based VLSI Architectures of Running DFT with Refreshing Mechanism. J. Signal Process. Syst. 91(5): 539-550 (2019) - [j18]Akash Agarwal
, Vibhooti Kumar Sinha, Rakesh Palisetty
, Preetam Kumar, Kailash Chandra Ray, Kamlesh Kumar, Tulika Pandey:
Performance Analysis and FPGA Prototype of Variable Rate GO-OFDMA Baseband Transmission Scheme. Wirel. Pers. Commun. 108(2): 785-809 (2019) - [c11]Pritiranjan Khatua
, Kailash Chandra Ray:
A Basis Function for DCT Based Discrete Orthogonal S-Transform. iSES 2019: 7-11 - [c10]Amit Kumar Panda
, Rakesh Palisetty
, Kailash Chandra Ray:
Area-Efficient Parallel-Prefix Binary Comparator. iSES 2019: 12-16 - [c9]Garima Sahu, Kailash Chandra Ray:
An Efficient Signal Processing Technique for Automated Myocardial Infarction Detection. iSES 2019: 93-98 - [c8]Vivek Singh, Kailash Chandra Ray, Somanath Tripathy:
Blind Detection and Classification Algorithm for Smart Audio Monitoring System. iSES 2019: 133-138 - [c7]Satyam Shukla, Kailash Chandra Ray:
Design and ASIC Implementation of a Reconfigurable Fault-Tolerant ALU for Space Applications. iSES 2019: 156-159 - 2018
- [j17]Sandeep Raj
, Kailash Chandra Ray
:
Automated recognition of cardiac arrhythmias using sparse decomposition over composite dictionary. Comput. Methods Programs Biomed. 165: 175-186 (2018) - [j16]Sandeep Raj
, Kailash Chandra Ray:
Sparse representation of ECG signals for automated recognition of cardiac arrhythmias. Expert Syst. Appl. 105: 49-64 (2018) - [j15]Sandeep Raj
, Kailash Chandra Ray:
A Personalized Point-of-Care Platform for Real-Time ECG Monitoring. IEEE Trans. Consumer Electron. 64(4): 452-460 (2018) - [j14]Rakesh Palisetty
, Kailash Chandra Ray:
FPGA Prototype and Real Time Analysis of Multiuser Variable Rate CI-GO-OFDMA. IEEE Trans. Instrum. Meas. 67(3): 538-546 (2018) - [j13]Kailash Chandra Ray
, M. V. N. V. Prasad, Anindya Sundar Dhar:
An Efficient VLSI Architecture for Computation of Discrete Fractional Fourier Transform. J. Signal Process. Syst. 90(11): 1569-1580 (2018) - 2017
- [j12]Vikas Kumar, Kailash Chandra Ray, Preetam Kumar:
A VLSI architecture of CORDIC-based popular windows and its FPGA prototype. Int. J. High Perform. Syst. Archit. 7(2): 57-69 (2017) - [j11]Sandeep Raj
, Kailash Chandra Ray:
ECG Signal Analysis Using DCT-Based DOST and PSO Optimized SVM. IEEE Trans. Instrum. Meas. 66(3): 470-478 (2017) - [c6]Don Kurian Dennis, Ayushi Priyam, Sukhpreet Singh Virk, Sajal Agrawal, Tanuj Sharma, Arijit Mondal, Kailash Chandra Ray:
Single cycle RISC-V micro architecture processor and its FPGA prototype. ISED 2017: 1-5 - [c5]Sandeep Raj, Kailash Chandra Ray:
Application of variational mode decomposition and ABC optimized DAG-SVM in arrhythmia analysis. ISED 2017: 1-5 - 2016
- [j10]Sandeep Raj
, Kailash Chandra Ray, Om Shankar:
Cardiac arrhythmia beat classification using DOST and PSO tuned SVM. Comput. Methods Programs Biomed. 136: 163-177 (2016) - [j9]Piyush Sharma, Kailash Chandra Ray:
Efficient methodology for electrocardiogram beat classification. IET Signal Process. 10(7): 825-832 (2016) - [j8]K. K. Soundra Pandian
, Kailash Chandra Ray:
Dynamic Hash key-based stream cipher for secure transmission of real time ECG signal. Secur. Commun. Networks 9(17): 4391-4402 (2016) - 2015
- [j7]K. K. Soundra Pandian
, Kailash Chandra Ray:
Five decade evolution of feedback shift register: algorithms, architectures and applications. Int. J. Commun. Networks Distributed Syst. 15(2/3): 279-312 (2015) - [j6]Sandeep Raj
, G. S. S. Praveen Chand, Kailash Chandra Ray:
ARM-based arrhythmia beat monitoring system. Microprocess. Microsystems 39(7): 504-511 (2015) - [j5]K. K. Soundra Pandian
, Kailash Chandra Ray:
Non-singular sequence folding-based pseudorandom key generation algorithm for cryptographic processor. Secur. Commun. Networks 8(18): 4019-4027 (2015) - [c4]Amit Kumar Panda
, Kailash Chandra Ray:
FPGA Prototype of Low Latency BBS PRNG. iNIS 2015: 118-123 - [c3]Arun Kumar Singh, Madhav Kumar Singh, Kailash Chandra Ray:
Design and Implementation of Quadruple Floating-Point CORDIC. iNIS 2015: 286-290 - 2014
- [j4]Vikas Kumar
, Kailash Chandra Ray, Preetam Kumar:
CORDIC-based VLSI architecture for real time implementation of flat top window. Microprocess. Microsystems 38(8): 1063-1071 (2014) - [j3]Rohit Shukla
, Kailash Chandra Ray:
Low Latency Hybrid CORDIC Algorithm. IEEE Trans. Computers 63(12): 3066-3078 (2014) - [j2]Kailash Chandra Ray, Anindya Sundar Dhar:
CORDIC-Based VLSI Architecture for Implementing Kaiser-Bessel Window in Real Time Spectral Analysis. J. Signal Process. Syst. 74(2): 235-244 (2014) - [c2]Saptadeep Pal, K. K. Soundra Pandian
, Kailash Chandra Ray:
FPGA implementation of stream cipher using Toeplitz Hash function. ICACCI 2014: 1834-1838 - 2011
- [c1]Vinay Gautam
, Kailash Chandra Ray, Pauline C. Haddow:
Hardware efficient design of Variable Length FFT Processor. DDECS 2011: 309-312
2000 – 2009
- 2008
- [j1]Kailash Chandra Ray, A. S. Dhar:
High Throughput VLSI Architecture for Blackman Windowing in Real Time Spectral Analysis. J. Comput. 3(5): 54-59 (2008)
Coauthor Index
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last updated on 2024-04-25 05:53 CEST by the dblp team
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