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2010 – 2019
- 2019
[j9]Makoto Ozawa
, Scott A. Taylor:
Two More Proofs that the Kinoshita Graph is Knotted. Am. Math. Mon. 126(4): 352-357 (2019)- 2017
- [j8]Ryan Blair, Marion Campisi, Jesse Johnson, Scott A. Taylor, Maggy Tomova:
Neighbors of Knots in the Gordian Graph. Am. Math. Mon. 124(1): 4-23 (2017) - 2015
- [j7]Victor V. Zyuban, Joshua Friedrich, Daniel M. Dreps, Jürgen Pille, Donald W. Plass, Phillip J. Restle, Zeynep Toprak Deniz, Matthew M. Ziegler, Sam G. Chu, Md. Saiful Islam, James D. Warnock, Bob Philhower, Rahul M. Rao, Gregory S. Still, David Shan, Eric Fluhr, Jose Paredes, Dieter F. Wendel, Christopher J. Gonzalez, D. Hogenmiller, Ruchir Puri, Scott A. Taylor, Stephen D. Posluszny:
IBM POWER8 circuit design and energy optimization. IBM J. Res. Dev. 59(1) (2015) - 2013
- [j6]Victor V. Zyuban, Scott A. Taylor, Birger Christensen, A. R. Hall, Christopher J. Gonzalez, Joshua Friedrich, Frances Clougherty, Jon Tetzloff, Rajeev R. Rao:
IBM POWER7+ design for higher frequency at fixed power. IBM J. Res. Dev. 57(6) (2013) - 2011
- [j5]Dieter F. Wendel, Ronald N. Kalla, James D. Warnock, Robert Cargnoni, Sam G. Chu, Joachim G. Clabes, Daniel Dreps, David Hrusecky, Joshua Friedrich, Md. Saiful Islam, James A. Kahle, Jens Leenstra, Gaurav Mittal, Jose Paredes, Juergen Pille, Phillip J. Restle, Balaram Sinharoy, George Smith, William J. Starke, Scott A. Taylor, James Van Norstrand, Stephen Weitzel, Phillip G. Williams, Victor V. Zyuban:
POWER7™, a Highly Parallel, Scalable Multi-Core High End Server Processor. IEEE J. Solid State Circuits 46(1): 145-161 (2011) - 2010
- [c6]Dieter F. Wendel, Ronald N. Kalla, Robert Cargnoni, Joachim G. Clabes, Joshua Friedrich, Roland Frech, James A. Kahle, Balaram Sinharoy, William J. Starke, Scott A. Taylor, Steve Weitzel, Sam G. Chu, Md. Saiful Islam, Victor V. Zyuban:
The implementation of POWER7TM: A highly parallel and scalable multi-core high-end server processor. ISSCC 2010: 102-103
2000 – 2009
- 2007
- [c5]Joshua Friedrich, Bradley D. McCredie, Norman K. James, Bill Huott, Brian W. Curran, Eric Fluhr, Gaurav Mittal, Eddie Chan, Yuen H. Chan, Donald W. Plass, Sam G. Chu, Hung Q. Le, Leo Clark, John R. Ripley, Scott A. Taylor, Jack DiLullo, Mary Yvonne Lanzerotti:
Design of the Power6 Microprocessor. ISSCC 2007: 96-97 - 2001
- [c4]Scott A. Taylor, Carl Ramey, Craig Barner, David Asher:
A Simulation-Based Method for the Verification of Shared Memory in Multiprocessor Systems. ICCAD 2001: 10-17
1990 – 1999
- 1999
- [j4]Carmine Nicoletta, Jose Alvarez, Eric Barkin, Chai-Chin Chao, Brad R. Johnson, Franklin M. Lassandro, Paresh Patel, Douglas Reid, Hector Sanchez, Joshua Siegel, Michael Snyder, Steven Sullivan, Scott A. Taylor, Minh Vo:
A 450-MHz RISC microprocessor with enhanced instruction set and copper interconnect. IEEE J. Solid State Circuits 34(11): 1478-1491 (1999) - [c3]Steven Sullivan, Brad R. Johnson, Douglas Reid, Scott A. Taylor:
A 1.8 V, 2.0 ns cycle, 32 KB embedded memory with interleaved castout/reload. CICC 1999: 235-238 - 1998
- [c2]Scott A. Taylor, Michael Quinn, Darren Brown, Nathan Dohm, Scot Hildebrandt, James Huggins, Carl Ramey:
Functional Verification of a Multiple-issue, Out-of-Order, Superscalar Alpha Processor - The DEC Alpha 21264 Microprocessor. DAC 1998: 638-643 - [c1]Nathan Dohm, Carl Ramey, Darren Brown, Scot Hildebrandt, James Huggins, Michael Quinn, Scott A. Taylor:
Zen and the art of Alpha verification. ICCD 1998: 111-117 - 1997
- [j3]Gianfranco Gerosa, Mike Alexander, Jose Alvarez, Cody Croxton, Michael D'Addeo, A. Richard Kennedy, Carmine Nicoletta, James P. Nissen, Ross Philip, Paul Reed, Hector Sanchez, Scott A. Taylor, Brad Burgess:
A 250-MHz 5-W PowerPC microprocessor with on-chip L2 cache controller. IEEE J. Solid State Circuits 32(11): 1635-1649 (1997) - 1996
- [j2]Scott A. Taylor:
Teaching a Law Seminar on the Internet. J. Inf. Law Technol. 1996(3) (1996) - 1995
- [j1]John H. Edmondson, Paul I. Rubinfeld, Peter J. Bannon, Bradley J. Benschneider, Debra Bernstein, Ruben W. Castelino, Elizabeth M. Cooper, Daniel E. Dever, Dale R. Donchin, Timothy C. Fischer, Anil K. Jain, Shekhar Mehta, Jeanne E. Meyer, Ronald P. Preston, Vidya Rajagopalan, Chandrasekhara Somanathan, Scott A. Taylor, Gilbert M. Wolrich:
Internal Organization of the Alpha 21164, a 300-MHz 64-bit Quad-issue CMOS RISC Microprocessor. Digit. Tech. J. 7(1) (1995)
Coauthor Index
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