Efficient Analog Layout Generation for In-RRAM Computing Circuits via Area and Wire Optimization.

Mon, 01 Jan 2024 00:00:00 +0100

Bo-Han Li, Kuan-Chih Lin, Hao Zuo, Po-Cheng Pan, Hung-Ming Chen, Shyh-Jye Jou, Chien-Nan Jimmy Liu, Bo-Cheng Lai:
Efficient Analog Layout Generation for In-RRAM Computing Circuits via Area and Wire Optimization. MWSCAS 2024: 1085-1090