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Yanbin Jiang
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2020 – today
- 2024
- [j7]Yanbin Jiang, Huifang Ma, Xiaohui Zhang, Zhixin Li, Liang Chang:
Incorporating metapath interaction on heterogeneous information network for social recommendation. Frontiers Comput. Sci. 18(1): 181302 (2024) - 2022
- [j6]Yuhang Liu, Huifang Ma, Yanbin Jiang, Zhixin Li:
Modelling risk and return awareness for p2p lending recommendation with graph convolutional networks. Appl. Intell. 52(5): 4999-5014 (2022) - [j5]Qingqing Li, Huifang Ma, Ju Li, Zhixin Li, Yanbin Jiang:
Searching Target Communities with Outliers in attributed graph. Knowl. Based Syst. 235: 107622 (2022) - [c9]Yanbin Jiang, Huifang Ma, Xiaohui Zhang, Zhixin Li, Liang Chang:
An Effective Two-way Metapath Encoder over Heterogeneous Information Network for Recommendation. ICMR 2022: 90-98 - 2021
- [j4]Yuhang Liu, Huifang Ma, Yanbin Jiang, Zhixin Li:
Learning to recommend via random walk with profile of loan and lender in P2P lending. Expert Syst. Appl. 174: 114763 (2021) - [j3]Yanbin Jiang, Huifang Ma, Yuhang Liu, Zhixin Li, Liang Chang:
Enhancing social recommendation via two-level graph attentional networks. Neurocomputing 449: 71-84 (2021) - [c8]Yanbin Jiang, Huifang Ma, Yuhang Liu, Zhixin Li:
Attentional Social Recommendation System with Graph Convolutional Network. IJCNN 2021: 1-8 - 2020
- [c7]Yanbin Jiang, Huifang Ma, Yuhang Liu, Zhixin Li:
Exploring User Trust and Reliability for Recommendation: A Hypergraph Ranking Approach. ICONIP (2) 2020: 333-344 - [c6]Yuhang Liu, Huifang Ma, Yanbin Jiang, Zhixin Li:
Top-N Recommendation in P2P Lending: A Hybrid Graph Ranking Using Investor Profile. ICONIP (2) 2020: 700-712
2010 – 2019
- 2016
- [c5]Yanbin Jiang, Pengyu Zhou, Rongxin Zhan, Xiang Li, Dongni Li:
An artificial bee colony with self-adaptive operators and alterable search depth approach for intercell scheduling. CEC 2016: 112-119
2000 – 2009
- 2001
- [j2]Yanbin Jiang, Sachin S. Sapatnekar, Cyrus Bamji:
Technology mapping for high-performance static CMOS and pass transistor logic designs. IEEE Trans. Very Large Scale Integr. Syst. 9(5): 577-589 (2001)
1990 – 1999
- 1999
- [c4]Yanbin Jiang, Sachin S. Sapatnekar:
An integrated algorithm for combined placement and libraryless technology mapping. ICCAD 1999: 102-106 - 1998
- [j1]Yanbin Jiang, Sachin S. Sapatnekar, Cyrus Bamji, Juho Kim:
Interleaving buffer insertion and transistor sizing into a single optimization. IEEE Trans. Very Large Scale Integr. Syst. 6(4): 625-633 (1998) - [c3]Yanbin Jiang, Sachin S. Sapatnekar, Cyrus Bamji, Juho Kim:
Combined transistor sizing with buffer insertion for timing optimization. CICC 1998: 605-608 - [c2]Yanbin Jiang, Sachin S. Sapatnekar, Cyrus Bamji:
A fast global gate collapsing technique for high performance designs using static CMOS and pass transistor logic. ICCD 1998: 276-281 - 1997
- [c1]Juho Kim, Cyrus Bamji, Yanbin Jiang, Sachin S. Sapatnekar:
Concurrent transistor sizing and buffer insertion by considering cost-delay tradeoffs. ISPD 1997: 130-135
Coauthor Index
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