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2020 – today
- 2023
[i1]Bita Darvish Rouhani, Ritchie Zhao, Ankit More, Mathew Hall, Alireza Khodamoradi, Summer Deng, Dhruv Choudhary, Marius Cornea, Eric Dellinger, Kristof Denolf, Dusan Stosic, Venmugil Elango, Maximilian Golub, Alexander Heinecke, Phil James-Roxby, Dharmesh Jani, Gaurav Kolhe, Martin Langhammer, Ada Li, Levi Melnick, Maral Mesmakhosroshahi, Andres Rodriguez, Michael Schulte, Rasoul Shafipour, Lei Shao, Michael Y. Siu, Pradeep Dubey, Paulius Micikevicius, Maxim Naumov, Colin Verilli, Ralph Wittig, Doug Burger, Eric S. Chung:
Microscaling Data Formats for Deep Learning. CoRR abs/2310.10537 (2023)- 2020
- [c12]Martin Voogel, Yohan Frans, Matt Ouellette, Jason Coppens, Sagheer Ahmad, Jaideep Dastidar, Ehab Mohsen, Faisal Dada, Mike Thompson, Ralph Wittig, Trevor Bauer, Gaurav Singh:
Xilinx Versal™ Premium. Hot Chips Symposium 2020: 1-46
2010 – 2019
- 2019
- [c11]Sagheer Ahmad, Sridhar Subramanian, Vamsi Boppana, Shankar Lakka, Fu-Hing Ho, Tomai Knopp, Juanjo Noguera, Gaurav Singh, Ralph Wittig:
Xilinx First 7nm Device: Versal AI Core (VC1902). Hot Chips Symposium 2019: 1-28 - 2016
- [j3]Sagheer Ahmad, Vamsi Boppana, Ilya Ganusov, Vinod Kathail, Vidya Rajagopalan, Ralph Wittig:
A 16-nm Multiprocessing System-on-Chip Field-Programmable Gate Array Platform. IEEE Micro 36(2): 48-62 (2016) - 2015
- [c10]Jasmina Vasiljevic, Ralph Wittig, Paul Schumacher, Jeff Fifield, Fernando Martinez-Vallina, Henry Styles, Paul Chow:
OpenCL library of stream memory components targeting FPGAs. FPT 2015: 104-111 - [c9]Vamsi Boppana, Sagheer Ahmad, Ilya Ganusov, Vinod Kathail, Vidya Rajagopalan, Ralph Wittig:
UltraScale+ MPSoC and FPGA families. Hot Chips Symposium 2015: 1-37 - 2011
- [c8]Vidya Rajagopalan, Vamsi Boppana, Sandeep Dutta, Brad Taylor, Ralph Wittig:
Xilinx Zynq-7000 EPP: An extensible processing platform family. Hot Chips Symposium 2011: 1-24 - 2010
- [j2]Krste Asanovic, Ralph Wittig:
Guest Editors' Introduction: Hot Chips 21. IEEE Micro 30(2): 5-6 (2010) - [j1]Manuel Saldaña, Arun Patel, Christopher A. Madill, Daniel Nunes, Danyao Wang, Paul Chow, Ralph Wittig, Henry Styles, Andrew Putnam
:
MPI as a Programming Model for High-Performance Reconfigurable Computers. ACM Trans. Reconfigurable Technol. Syst. 3(4): 22:1-22:29 (2010) - [c7]Brad Taylor, Ralph Wittig:
28nm generation programmable families. Hot Chips Symposium 2010: 1-25
2000 – 2009
- 2009
- [c6]Andrew Putnam, Susan J. Eggers, Dave Bennett, Eric Dellinger, Jeff Mason, Henry Styles, Prasanna Sundararajan, Ralph Wittig:
Performance and power of cache-based reconfigurable computing. FPGA 2009: 281 - [c5]Andrew Putnam, Susan J. Eggers, Dave Bennett, Eric Dellinger, Jeff Mason, Henry Styles, Prasanna Sundararajan, Ralph Wittig:
Performance and power of cache-based reconfigurable computing. ISCA 2009: 395-405 - 2008
- [c4]Manuel Saldaña, Arun Patel, Christopher A. Madill, Daniel Nunes, Danyao Wang, Henry Styles, Andrew Putnam, Ralph Wittig, Paul Chow:
MPI as an abstraction for software-hardware interaction for HPRCs. HPRCTA@SC 2008: 1-10 - [c3]Dave Strenski, Jim Simkins, Richard Walke, Ralph Wittig:
Evaluating FPGAs for floating-point performance. HPRCTA@SC 2008: 1-6
1990 – 1999
- 1998
- [c2]James Hwang, Cameron Patterson, S. Mohan, Eric Dellinger, Sujoy Mitra, Ralph Wittig:
Generating Layouts for Self-implementing Modules. FPL 1998: 525-529 - 1996
- [c1]Ralph Wittig, Paul Chow:
OneChip: an FPGA processor with reconfigurable logic. FCCM 1996: 126-135
Coauthor Index
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