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Krishna Saraswat
Person information
- affiliation: Stanford University, USA
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2020 – today
- 2024
- [c23]Eros Reato, P. Palacios, J. A. Yang, S. Wahid, Marc Jaikissoon, J.-S. Ko, Alwin Daus, M. Saeed, Krishna C. Saraswat, Renato Negra, Eric Pop, Max Christian Lemme:
Nanoscale MoS2 Transistors on Polyimide for Radio-Frequency Operation. DRC 2024: 1-2 - [c22]J. A. Yang, Eros Reato, Theresia Knobloch, J.-S. Ko, Z. Zhang, Andrew J. Mannix, Krishna Saraswat, Tibor Grasser, Max Christian Lemme, Eric Pop:
Quantifying Defect-Mediated Electron Capture and Emission in Flexible Monolayer WS2 Field-Effect Transistors. DRC 2024: 1-2 - 2023
- [c21]Marc Jaikissoon, Jung-Soo Ko, Eric Pop
, Krishna C. Saraswat:
Local Back-Gate Monolayer MoS2 Transistors with Channel Lengths Down to 50 nm and EOT ∼ 1 nm Showing Improved $I_{\text{on}}$ using Post-Metal Anneal. DRC 2023: 1-2 - [c20]Jung-Soo Ko, Zichen Zhang, Sol Lee, Marc Jaikissoon, Robert K. A. Bennett, Kwanpyo Kim, Andrew C. Kummel, Prabhakar Bandaru, Eric Pop, Krishna C. Saraswat:
Ultrathin Gate Dielectric Enabled by Nanofog Aluminum Oxide on Monolayer MoS2. ESSDERC 2023: 1-4 - 2022
- [c19]Lauren Hoang, Alwin Daus
, Sumaiya Wahid, Jimin Kwon, Jung-Soo Ko, Shengjun Qin, Mahnaz Islam, Krishna C. Saraswat, H.-S. Philip Wong, Eric Pop
:
Bias Stress Stability of ITO Transistors and its Dependence on Dielectric Properties. DRC 2022: 1-2 - [c18]Marc Jaikissoon, Jerry A. Yang, Kathryn M. Neilson, Eric Pop
, Krishna C. Saraswat:
Mobility Enhancement of Monolayer MoS2 Transistors using Tensile-Stressed Silicon Nitride Capping Layers. DRC 2022: 1-2 - [c17]Sumaiya Wahid, Alwin Daus
, Jimin Kwon, Shengjun Qin, Jung-Soo Ko, Krishna C. Saraswat, H.-S. Philip Wong, Eric Pop
:
First Demonstration of Top-Gated ITO Transistors: Effect of Channel Passivation. DRC 2022: 1-2 - [c16]Asir Intisar Khan, Christopher Perez, Xiangjin Wu, Byoungjun Won, Kangsik Kim, Heungdong Kwon, Pranav Ramesh, Kathryn M. Neilson, Mehdi Asheghi, Krishna Saraswat, Zonghoon Lee, Il-Kwon Oh, H.-S. Philip Wong, Kenneth E. Goodson, Eric Pop
:
First Demonstration of Ge2Sb2Te5-Based Superlattice Phase Change Memory with Low Reset Current Density (~3 MA/cm2) and Low Resistance Drift (~0.002 at 105°C). VLSI Technology and Circuits 2022: 310-311 - 2020
- [c15]Aravindh Kumar, Koosha Nassiri Nazif, Pranav Ramesh, Krishna Saraswat:
Doped WS2 transistors with large on-off ratio and high on-current. DRC 2020: 1-2
2010 – 2019
- 2019
- [c14]Junkyo Suh, Andrew C. Meng, Marc Jaikissoon, Michael Braun, Taeho R. Kim, Ann F. Marshall, Anahita Pakzad, Paul C. McIntyre, Krishna C. Saraswat:
3D-stacked Strained SiGe/Ge Gate-All-Around (GAA) Structure Fabricated by 3D Ge Condensation. DRC 2019: 249-250 - 2018
- [c13]Nirmal R. Saxena, Sanu Mathew, Krishna Saraswat:
Keynote 1: The road to resilient computing in autonomous driving is paved with redundancy. IRPS 2018: 1-3 - 2015
- [c12]Shashank Gupta, Srinivasan Ashwyn Srinivasan, Marianna Pantouvaki, Hongtao Chen, Peter Verheyen, Guy Lepage, Dries Van Thourhout, Gunther Roelkens, Krishna Saraswat, Philippe P. Absil, Joris Van Campenhout:
50GHz Ge waveguide electro-absorption modulator integrated in a 220nm SOI photonics platform. OFC 2015: 1-3 - 2010
- [c11]Chia-Hsin Owen Chen, Niket Agarwal, Tushar Krishna, Kyung-Hoae Koo, Li-Shiuan Peh, Krishna Saraswat:
Physical vs. Virtual Express Topologies with Low-Swing Links for Future Many-Core NoCs. NOCS 2010: 173-180
2000 – 2009
- 2009
- [c10]Krishna Saraswat:
Performance comparison of cu/low-k, carbon nanotube, and optics for on-chip and off-chip interconnects. SLIP 2009: 111-112 - 2008
- [c9]Krishna Saraswat, Hoyeol Cho, Pawan Kapur, Kyung-Hoae Koo:
Performance comparison between copper, carbon nanotube, and optical interconnects. ISCAS 2008: 2781-2784 - 2007
- [c8]Hoyeol Cho, Kyung-Hoae Koo, Pawan Kapur, Krishna Saraswat:
Modeling of the performance of carbon nanotube bundle, cu/low-k and optical on-chip global interconnects. SLIP 2007: 81-88 - 2004
- [c7]Krishna Saraswat:
Performance Limitations of Devices and Interconnects and Possible Alternatives for Nanoelectronics. ISQED 2004: 327 - [c6]Bipin Rajendran, Pawan Kapur, Krishna Saraswat, R. Fabian W. Pease:
Self-consistent power/performance/reliability analysis for copper interconnects. SLIP 2004: 17-22 - 2002
- [c5]Pawan Kapur, Gaurav Chandra, Krishna Saraswat:
Power estimation in global interconnects and its reduction using a novel repeater optimization methodology. DAC 2002: 461-466 - 2001
- [j3]Valeriy Sukharev
, Ben P. Shieh, Ratan K. Choudhury, Chong W. Park, Krishna C. Saraswat:
Reliability Studies on Multilevel Interconnection with Intermetal Dielectric Air Gaps. Microelectron. Reliab. 41(9-10): 1631-1635 (2001) - [j2]Jeffery A. Davis, Raguraman Venkatesan, Alan Kaloyeros, Michael Beylansky, Shukri J. Souri, Kaustav Banerjee, Krishna C. Saraswat, Arifur Rahman, Rafael Reif, James D. Meindl:
Interconnect limits on gigascale integration (GSI) in the 21st century. Proc. IEEE 89(3): 305-324 (2001) - [j1]Kaustav Banerjee, Shukri J. Souri, Pawan Kapur, Krishna C. Saraswat:
3-D ICs: a novel chip design for improving deep-submicrometer interconnect performance and systems-on-chip integration. Proc. IEEE 89(5): 602-633 (2001) - [c4]TingYen Chiang, Kaustav Banerjee, Krishna Saraswat:
Compact Modeling and SPICE-Based Simulation for Electrothermal Analysis of Multilevel ULSI Interconnects. ICCAD 2001: 165- - 2000
- [c3]Shukri J. Souri, Kaustav Banerjee, Amit Mehrotra, Krishna Saraswat:
Multiple Si layer ICs: motivation, performance analysis, and design implications. DAC 2000: 213-220 - [c2]Krishna Saraswat, Shukri J. Souri, Kaustav Banerjee, Pawan Kapur:
Performance analysis and technology of 3-D ICs. SLIP 2000: 85-90
1990 – 1999
- 1995
- [c1]Shailesh Agarwal, Arthur M. Keller, Gio Wiederhold, Krishna Saraswat:
Flexible Relation: An Approach for Integrating Data from Multiple, Possibly Inconsistent Databases. ICDE 1995: 495-504
Coauthor Index
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last updated on 2024-08-20 20:32 CEST by the dblp team
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