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2020 – today
- 2024
[c27]Tim Henkes, Steffen Reith, Marc Stöttinger, Norbert Herfurth, Goran Panic, Julian Wälde, Fabian Buschkowski, Pascal Sasdrich, Christoph Lüth, Milan Funck, Tuba Kiyan, Arnd Weber, Detlef Boeck, René Rathfelder, Torsten Grawunder:
Evaluating an Open-Source Hardware Approach from HDL to GDS for a Security Chip Design - a Review of the Final Stage of Project HEP. DATE 2024: 1-6- [c26]Zoya Dyka, Ievgen Kabin, Marcin Brzozowski, Goran Panic, Cristiano Calligaro, Milos Krstic, Peter Langendoerfer:
On the Influence of Cell Libraries and Other Parameters to SCA Resistance of Crypto IP Cores. MECO 2024: 1-5 - 2022
- [j6]Alireza Hasani
, Lukasz Lopacinski, Goran Panic, Rolf Kraemer:
High-Throughput Multi-Frame Decoding of QC-LDPC Codes With Modified Rejection-Based Minimum Finding. IEEE Access 10: 5378-5389 (2022) - [j5]Lukasz Lopacinski, Nebojsa Maletic, Goran Panic, Alireza Hasani, Jesús Gutiérrez, Eckhard Grass:
Real-Valued Spreading Sequences for PSSS Based High-Speed Wireless Systems. IEEE Access 10: 8673-8692 (2022) - [c25]Alireza Hasani, Lukasz Lopacinski, Goran Panic, Eckhard Grass:
550 Gbps Fully Parallel Fully Unrolled LDPC Decoder in 28 nm CMOS Technology. EuCNC 2022: 429-433 - [c24]Lukasz Lopacinski, Alireza Hasani, Goran Panic, Nebojsa Maletic, Oliver Schrape, Jesús Gutiérrez, Milos Krstic, Eckhard Grass:
Ultra High-Speed BP Decoder for Polar Codes achieving 1.4 Tbps in 28 nm CMOS. EuCNC 2022: 434-439 - [c23]Zoya Dyka, Ievgen Kabin, Marcin Brzozowski, Goran Panic, Cristiano Calligaro, Milos Krstic, Peter Langendoerfer:
On the SCA Resistance of Crypto IP Cores. LATS 2022: 1-2 - [c22]Lukasz Lopacinski, Alireza Hasani, Goran Panic, Nebojsa Maletic, Jesús Gutiérrez, Milos Krstic, Eckhard Grass, Rolf Kraemer:
A Hardware Optimized High Throughput LDPC Decoder Supporting 3 Tb/s in 28 nm CMOS. PIMRC 2022: 1326-1331 - [c21]Lukasz Lopacinski, Alireza Hasani, Goran Panic, Nebojsa Maletic, Jesús Gutiérrez, Milos Krstic, Eckhard Grass:
High-Speed SC Decoder for Polar Codes achieving 1.7 Tb/s in 28 nm CMOS. VLSI-SoC 2022: 1-6 - [c20]Lukasz Lopacinski, Alireza Hasani, Goran Panic, Nebojsa Maletic, Oliver Schrape, Jesús Gutiérrez, Milos Krstic, Eckhard Grass, Rolf Kraemer:
Ultra high speed 802.11n LDPC decoder with seven-stage pipeline in 28 nm CMOS. VTC Spring 2022: 1-5 - 2021
- [c19]Rijad Saric, Junchao Chen, Milos Krstic, Edhem Custovic, Goran Panic, Jasmin Kevric, Dejan Jokic:
Classification of Space Particle Events using Supervised Machine Learning Algorithms. DSAA 2021: 1-10
2010 – 2019
- 2019
- [j4]Lukasz Lopacinski, Miroslav Marinkovic, Goran Panic, Mohamed Hussein Eissa, Alireza Hasani, Karthik KrishneGowda, Rolf Kraemer:
Data Link Layer Processor for 100 Gbps Terahertz Wireless Communications in 28 nm CMOS Technology. IEEE Access 7: 44489-44502 (2019) - [c18]Lukasz Lopacinski, Mohamed Hussein Eissa, Goran Panic, Alireza Hasani, Rolf Kraemer:
Modular Data Link Layer Processing for THz communication. DDECS 2019: 1-5 - 2018
- [c17]Lukasz Lopacinski, Mohamed Hussein Eissa, Goran Panic, Marcin Brzozowski, Alireza Hasani, Rolf Kraemer:
Implementation of a Multi-Core Data Link Layer Processor for THz Communication. VTC Spring 2018: 1-5 - 2017
- [j3]Dwaipayan Biswas, Koushik Maharatna, Goran Panic, Evangelos B. Mazomenos, Josy Achner, Jasmin Klemke, Michael Jöbges, Steffen Ortmann:
Low-Complexity Framework for Movement Classification Using Body-Worn Sensors. IEEE Trans. Very Large Scale Integr. Syst. 25(4): 1537-1548 (2017) - 2016
- [j2]Goran Panic, Oliver Stecklina, Zoran Stamenkovic:
An Embedded Sensor Node Microcontroller with Crypto-Processors. Sensors 16(5): 607 (2016) - 2015
- [c16]Goran Panic, Zoran Stamenkovic:
Activity Profiling and Power Estimation for Embedded Wireless Sensor Node Design. DDECS 2015: 231-236 - [c15]Goran Panic:
Low Power Design Techniques. GI-Jahrestagung 2015: 1379 - [c14]Frank Vater, Goran Panic, Mario Schölzel:
Möglichkeiten der Nutzung von RRAM in Low-Power Microcontrollern. GI-Jahrestagung 2015: 1475-1486 - 2014
- [j1]Goran Panic, Milos Rackovic, Srdan Skrbic:
Fuzzy XML and prioritized fuzzy XQuery with implementation. J. Intell. Fuzzy Syst. 26(1): 303-316 (2014) - 2013
- [c13]Goran Panic, Oliver Schrape, Thomas Basmer, Frank Vater, Klaus Tittelbach-Helmrich:
TNODE: A low power sensor node processor for secure wireless networks. ISSoC 2013: 1-4 - 2012
- [c12]Goran Panic, Milos Rackovic, Srdan Skrbic:
Fuzzy XML with Implementation. BCI (Local) 2012: 58-62 - [c11]Dan Kreiser, Marcin Brzozowski, Goran Panic, Sonom Olonbayar, Thomas Basmer, Peter Langendörfer:
The all IHP sensor node: highly integrated sensor nodes using IHP components. MOBIWAC 2012: 147-148 - [c10]Goran Panic, Thomas Basmer, Schomann Henry, Steffen Peter, Frank Vater, Klaus Tittelbach-Helmrich:
Design of a sensor node crypto processor for IEEE 802.15.4 applications. SoCC 2012: 213-217 - 2011
- [c9]Goran Panic, Thomas Basmer, Oliver Schrape, Steffen Peter, Frank Vater, Klaus Tittelbach-Helmrich:
Sensor node processor for security applications. ICECS 2011: 81-84 - [c8]Emilija Miletic, Klaus Tittelbach-Helmrich, Goran Panic:
Performance Investigation on an MIMO-capable 802.11a Compliant MAC Protocol Implementation. MSN 2011: 190-193 - 2010
- [c7]Goran Panic, Thomas Basmer, Klaus Tittelbach-Helmrich, Lukasz Lopacinski:
Low power sensor node processor architecture. ICECS 2010: 914-917 - [c6]Miroslav Marinkovic, Maxim Piz, Chang-Soon Choi, Goran Panic, Marcus Ehrig, Eckhard Grass:
Performance evaluation of channel coding for Gbps 60-GHz OFDM-based wireless communications. PIMRC 2010: 994-998
2000 – 2009
- 2008
- [c5]Zoran Stamenkovic, Goran Panic, Günter Schoof:
A System-On-Chip for Wireless Body Area Sensor Network Node. DDECS 2008: 132-135 - [c4]Goran Panic, Daniel Dietterle, Zoran Stamenkovic:
Architecture of a Power-Gated Wireless Sensor Node. DSD 2008: 844-849 - [c3]Goran Panic, Zoran Stamenkovic, Rolf Kraemer:
Power gating in wireless sensor networks. ISWPC 2008: 499-503 - [c2]Steffen Peter, Mario Zessack, Frank Vater, Goran Panic, Horst Frankenfeldt, Michael Methfessel:
An Encryption-Enabled Network Protocol Accelerator. WWIC 2008: 79-91 - 2003
- [c1]Goran Panic, Daniel Dietterle, Zoran Stamenkovic, Klaus Tittelbach-Helmrich:
A System-on-Chip Implementation of the IEEE 802.11a MAC Layer. DSD 2003: 319-324
Coauthor Index
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