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2020 – today
- 2024
[i8]Ian Fischer Schilling, Serdar Sahin, Camille Leroux, Antonio Maria Cipriano, Christophe Jégo:
Hardware Implementation of Soft Mapper/Demappers in Iterative EP-based Receivers. CoRR abs/2406.07934 (2024)- 2023
- [j19]Adrien Cassagne
, Romain Tajan, Olivier Aumage, Camille Leroux, Denis Barthou, Christophe Jégo:
A DSEL for high throughput and low latency software-defined radio on multicore CPUs. Concurr. Comput. Pract. Exp. 35(23) (2023) - [c30]Jonathan Saussereau, Christophe Jégo, Camille Leroux, Jean-Baptiste Bégueret:
Design and Implementation of a RISC-V core with a Flexible Pipeline for Design Space Exploration. ICECS 2023: 1-5 - [c29]Jonathan Saussereau, Camille Leroux, Jean-Baptiste Bégueret, Christophe Jégo:
AsteRISC: A Size-Optimized RISC-V Core for Design Space Exploration. ISCAS 2023: 1-5 - [c28]Malek Ellouze, Romain Tajan, Camille Leroux, Christophe Jégo, Charly Poulliat:
Low-Complexity Algorithm for the Minimum Distance Properties of PAC Codes. ISTC 2023: 1-5 - [c27]Sébastien Guigue, Camille Leroux, Jean-Baptiste Bégueret, Thierry Taris:
A 8.34 nW Wake-Up Receiver Achieving -50dBm Sensitivity at 2.4GHz. NEWCAS 2023: 1-4 - 2022
- [c26]Sébastien Guigue, Camille Leroux, Jean-Baptiste Bégueret, Thierry Taris:
Ultra Low Power 32-bit Microcontroller With Minimal Instruction Set for Internet of Things Applications. NEWCAS 2022: 298-302 - [c25]Alixe Devaux, Camille Leroux, Félicia Poggi, Clémence Lacoume, Lara Brière, Valentine Wilke, Philippe Meis:
Hellscape. SIGGRAPH Asia Computer Animation Festival 2022: 8:1 - [i7]Adrien Cassagne, Romain Tajan, Olivier Aumage, Camille Leroux, Denis Barthou, Christophe Jégo:
A DSEL for High Throughput and Low Latency Software-Defined Radio on Multicore CPUs. CoRR abs/2206.06147 (2022) - 2021
- [c24]Adrien Cassagne, Mathieu Léonardon, Romain Tajan, Camille Leroux, Christophe Jégo, Olivier Aumage, Denis Barthou:
A Flexible and Portable Real-time DVB-S2 Transceiver using Multicore and SIMD CPUs. ISTC 2021: 1-5 - [c23]Malek Ellouze, Camille Leroux, Romain Tajan, Charly Poulliat, Christophe Jégo:
Tailored List Decoding of Polar Codes. ISTC 2021: 1-5 - 2020
- [c22]Bertrand Le Gal, Yann Delomier, Camille Leroux, Christophe Jégo:
Low-Latency Sorter Architecture for Polar Codes Successive-Cancellation-List Decoding. SiPS 2020: 1-5
2010 – 2019
- 2019
- [j18]Alireza Ghaffari, Mathieu Léonardon, Adrien Cassagne, Camille Leroux, Yvon Savaria:
Toward High-Performance Implementation of 5G SCMA Algorithms. IEEE Access 7: 10402-10414 (2019) - [j17]Adrien Cassagne, Olivier Hartmann, Mathieu Léonardon, Kun He, Camille Leroux, Romain Tajan, Olivier Aumage, Denis Barthou, Thibaud Tonnellier, Vincent Pignoly, Bertrand Le Gal, Christophe Jégo:
AFF3CT: A Fast Forward Error Correction Toolbox! SoftwareX 10: 100345 (2019) - [j16]Mathieu Léonardon, Adrien Cassagne, Camille Leroux, Christophe Jégo, Louis-Philippe Hamelin, Yvon Savaria:
Fast and Flexible Software Polar List Decoders. J. Signal Process. Syst. 91(8): 937-952 (2019) - 2018
- [j15]Bertrand Le Gal, Camille Leroux, Christophe Jégo:
High-performance software implementations of SCAN decoder for polar codes. Ann. des Télécommunications 73(5-6): 401-412 (2018) - [j14]Pascal Giard, Gabi Sarkis, Camille Leroux, Claude Thibeault, Warren J. Gross:
Low-Latency Software Polar Decoders. J. Signal Process. Syst. 90(5): 761-775 (2018) - [c21]Mathieu Léonardon, Camille Leroux, David Binet, J. M. Pierre Langlois, Christophe Jégo, Yvon Savaria:
Custom Low Power Processor for Polar Decoding. ISCAS 2018: 1-5 - [c20]Mathieu Léonardon, Camille Leroux, Pekka Jääskeläinen, Christophe Jégo, Yvon Savaria:
Transport Triggered Polar Decoders. ISTC 2018: 1-5 - [c19]Adrien Cassagne, Olivier Aumage, Denis Barthou, Camille Leroux, Christophe Jégo:
MIPP: a Portable C++ SIMD Wrapper and its use for Error Correction Coding in 5G Standard. WPMVP@PPoPP 2018: 2:1-2:8 - 2017
- [j13]Guillaume Berhault, Camille Leroux, Christophe Jégo, Dominique Dallet:
Memory Requirement Reduction Method for Successive Cancellation Decoding of Polar Codes. J. Signal Process. Syst. 88(3): 425-438 (2017) - [c18]Alireza Ghaffari, Mathieu Léonardon, Yvon Savaria, Christophe Jégo, Camille Leroux:
Improving performance of SCMA MPA decoders using estimation of conditional probabilities. NEWCAS 2017: 21-24 - [c17]Bertrand Le Gal, Camille Leroux, Christophe Jégo:
Successive cancellation decoder for very long polar codes. SiPS 2017: 1-6 - [i6]Mathieu Léonardon, Adrien Cassagne, Camille Leroux, Christophe Jégo, Louis-Philippe Hamelin, Yvon Savaria:
Fast and Flexible Software Polar List Decoders. CoRR abs/1710.08314 (2017) - 2016
- [j12]Thibaud Tonnellier, Camille Leroux, Bertrand Le Gal, Benjamin Gadat, Christophe Jégo, Nicolas Van Wambeke:
Lowering the Error Floor of Turbo Codes With CRC Verification. IEEE Wirel. Commun. Lett. 5(4): 404-407 (2016) - [c16]Thibaud Tonnellier, Camille Leroux, Bertrand Le Gal, Christophe Jégo, Benjamin Gadat, Nicolas Van Wambeke:
Hardware architecture for lowering the error floor of LTE turbo codes. DASIP 2016: 107-112 - [c15]Adrien Cassagne, Olivier Aumage, Camille Leroux, Denis Barthou, Bertrand Le Gal:
Energy consumption analysis of software polar decoders on low power processors. EUSIPCO 2016: 642-646 - [c14]Bertrand Le Gal, Camille Leroux, Christophe Jégo:
Memory reduction techniques for successive cancellation decoding of polar codes. ICASSP 2016: 986-990 - [c13]Bertrand Le Gal, Camille Leroux, Christophe Jégo:
A scalable 3-phase polar decoder. ISCAS 2016: 417-420 - [c12]Adrien Cassagne, Thibaud Tonnellier, Camille Leroux, Bertrand Le Gal, Olivier Aumage, Denis Barthou:
Beyond Gbps Turbo decoder on multi-core CPUs. ISTC 2016: 136-140 - [c11]Thibaud Tonnellier, Camille Leroux, Bertrand Le Gal, Christophe Jégo, Benjamin Gadat, Nicolas Van Wambeke:
Lowering the error floor of double-binary turbo codes: The flip and check algorithm. ISTC 2016: 156-160 - 2015
- [j11]Bertrand Le Gal, Camille Leroux, Christophe Jégo:
Multi-Gb/s Software Decoding of Polar Codes. IEEE Trans. Signal Process. 63(2): 349-359 (2015) - [c10]Guillaume Berhault, Camille Leroux, Christophe Jégo, Dominique Dallet:
Hardware implementation of a soft cancellation decoder for polar codes. DASIP 2015: 1-8 - [c9]Guillaume Berhault, Camille Leroux, Christophe Jégo, Dominique Dallet:
Partial sums computation in polar codes decoding. ISCAS 2015: 826-829 - [c8]Adrien Cassagne, Bertrand Le Gal, Camille Leroux, Olivier Aumage, Denis Barthou:
An Efficient, Portable and Generic Library for Successive Cancellation Decoding of Polar Codes. LCPC 2015: 303-317 - [i5]Pascal Giard, Gabi Sarkis, Camille Leroux, Claude Thibeault, Warren J. Gross:
Low-Latency Software Polar Decoders. CoRR abs/1504.00353 (2015) - 2014
- [j10]Kevin Cushon, Saied Hemati, Camille Leroux, Shie Mannor, Warren J. Gross:
High-Throughput Energy-Efficient LDPC Decoders Using Differential Binary Message Passing. IEEE Trans. Signal Process. 62(3): 619-631 (2014) - [j9]Bertrand Le Gal, Christophe Jégo, Camille Leroux:
A Flexible NISC-Based LDPC Decoder. IEEE Trans. Signal Process. 62(10): 2469-2479 (2014) - [c7]Bertrand Le Gal, Camille Leroux, Christophe Jégo:
Software polar decoder on an embedded processor. SiPS 2014: 180-185 - 2013
- [j8]Camille Leroux, Alexandre J. Raymond, Gabi Sarkis, Warren J. Gross:
A Semi-Parallel Successive-Cancellation Decoder for Polar Codes. IEEE Trans. Signal Process. 61(2): 289-299 (2013) - [c6]Guillaume Berhault, Camille Leroux, Christophe Jégo, Dominique Dallet:
Partial sums generation architecture for successive cancellation decoding of polar codes. SiPS 2013: 407-412 - [i4]Guillaume Berhault, Camille Leroux, Christophe Jégo, Dominique Dallet:
Partial Sums Generation Architecture for Successive Cancellation Decoding of Polar Codes. CoRR abs/1309.7818 (2013) - [i3]Guillaume Berhault, Camille Leroux, Christophe Jégo, Dominique Dallet:
Partial Sums Computation In Polar Codes Decoding. CoRR abs/1310.1712 (2013) - 2012
- [j7]Camille Leroux, Alexandre J. Raymond, Gabi Sarkis, Ido Tal, Alexander Vardy, Warren J. Gross:
Hardware Implementation of Successive-Cancellation Decoders for Polar Codes. J. Signal Process. Syst. 69(3): 305-315 (2012) - [c5]Romain Heloir, Camille Leroux, Saied Hemati, Matthieu Arzel, Warren J. Gross:
Stochastic chase decoder for reed-solomon codes. NEWCAS 2012: 5-8 - 2011
- [j6]Camille Leroux, Christophe Jégo, Patrick Adde, Deepak Gupta, Michel Jézéquel:
Turbo Product Code Decoder Without Interleaving Resource: From Parallelism Exploration to High Efficiency Architecture. J. Signal Process. Syst. 64(1): 17-29 (2011) - [c4]Camille Leroux, Ido Tal, Alexander Vardy, Warren J. Gross:
Hardware architectures for successive cancellation decoding of polar codes. ICASSP 2011: 1665-1668 - [i2]Camille Leroux, Alexandre J. Raymond, Gabi Sarkis, Ido Tal, Alexander Vardy, Warren J. Gross:
Hardware Implementation of Successive Cancellation Decoders for Polar Codes. CoRR abs/1111.4362 (2011) - 2010
- [j5]Camille Leroux, Saied Hemati, Shie Mannor, Warren J. Gross:
Stochastic Chase Decoding of Reed-Solomon Codes. IEEE Commun. Lett. 14(9): 863-865 (2010) - [j4]Kevin Cushon, Camille Leroux, Saied Hemati, Shie Mannor, Warren J. Gross:
A Min-Sum Iterative Decoder Based on Pulsewidth Message Encoding. IEEE Trans. Circuits Syst. II Express Briefs 57-II(11): 893-897 (2010) - [i1]Camille Leroux, Ido Tal, Alexander Vardy, Warren J. Gross:
Hardware architectures for Successive Cancellation Decoding of Polar Codes. CoRR abs/1011.2919 (2010)
2000 – 2009
- 2009
- [j3]Camille Leroux, Christophe Jégo, Patrick Adde, Michel Jézéquel:
High-throughput Block Turbo Decoding: From Full-parallel Architecture to FPGA Prototyping. J. Signal Process. Syst. 57(3): 349-361 (2009) - 2008
- [j2]Raphaël Le Bidan, Camille Leroux, Christophe Jégo, Patrick Adde, Ramesh Pyndiah:
Reed-Solomon Turbo Product Codes for Optical Communications: From Code Optimization to Decoder Design. EURASIP J. Wirel. Commun. Netw. 2008 (2008) - [c3]Camille Leroux, Christophe Jégo, Patrick Adde, Michel Jézéquel:
On the higher efficiency of parallel Reed-Solomon turbo-decoding. ICECS 2008: 1308-1311 - [c2]Camille Leroux, Christophe Jégo, Patrick Adde, Michel Jézéquel, Deepak Gupta:
A highly parallel Turbo Product Code decoder without interleaving resource. SiPS 2008: 1-6 - 2007
- [j1]Christophe Jégo, Patrick Adde, Camille Leroux:
Architecture de turbo-décodeur en blocs entièrement parallèle pour la transmission de données au-delà du Gbit/s. Ann. des Télécommunications 62(1-2): 214-239 (2007) - [c1]Camille Leroux, Christophe Jégo, Patrick Adde, Michel Jézéquel:
Towards Gb/s turbo decoding of product code onto an FPGA device. ISCAS 2007: 909-912
Coauthor Index
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