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ORCIDThomas P. Kelliher
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2000 – 2009
- 2006
[c11]Shrirang M. Yardi, Benjamin Bishop, Thomas P. Kelliher:
HELLAS: a specialized architecture for interactive deformable object modeling. ACM Southeast Regional Conference 2006: 56-61- 2005
- [c10]Shrirang M. Yardi, Benjamin Bishop, Thomas P. Kelliher:
An Analysis of Iterative Deformable Solid Object Modeling. MSV 2005: 95-99 - 2003
- [j5]Benjamin Bishop, Thomas P. Kelliher:
Specialized hardware for deformable object modeling. IEEE Trans. Circuits Syst. Video Technol. 13(11): 1074-1079 (2003) - 2000
- [j4]Eric Gayles, Thomas P. Kelliher, Robert Michael Owens, Mary Jane Irwin:
The design of the MGAP-2: a micro-grained massively parallel array. IEEE Trans. Very Large Scale Integr. Syst. 8(6): 709-716 (2000) - [c9]Benjamin Bishop, Thomas P. Kelliher, Mary Jane Irwin:
SPARTA: Simulation of Physics on a Real-Time Architecture. ACM Great Lakes Symposium on VLSI 2000: 177-182 - [c8]Benjamin Bishop, Thomas P. Kelliher, Mary Jane Irwin:
Hardware/Software Co-design for Real-Time Physical Modeling. IEEE International Conference on Multimedia and Expo (III) 2000: 1363-1366
1990 – 1999
- 1999
- [j3]Benjamin Bishop, Thomas P. Kelliher, Robert Michael Owens, Mary Jane Irwin:
Aggressive Dynamic Execution of Decoded Traces. J. VLSI Signal Process. 22(1): 65-75 (1999) - [c7]Benjamin Bishop, Thomas P. Kelliher, Mary Jane Irwin:
The Design of a Register Renaming Unit. Great Lakes Symposium on VLSI 1999: 34-37 - 1997
- [c6]Kevin P. Acken, Eric Gayles, Thomas P. Kelliher, Robert Michael Owens, Mary Jane Irwin:
The MGAP Family of Processor Arrays. Great Lakes Symposium on VLSI 1997: 105- - 1996
- [c5]Raminder Singh Bajwa, Robert Michael Owens, Thomas P. Kelliher:
Simultaneous speech segmentation and phoneme recognition using dynamic programming. ICASSP 1996: 3213-3216 - 1995
- [c4]Thomas P. Kelliher, Eric Gayles, Robert Michael Owens, Mary Jane Irwin:
The MGAP-2: an advanced, massively parallel VLSI signal processor. ICASSP 1995: 3219-3222 - 1993
- [j2]Robert Michael Owens, Thomas P. Kelliher, Mary Jane Irwin, Mohan Vishwanath, Raminder Singh Bajwa, Wen-Lin Yang:
The design and implementation of the Arithmetic Cube II, a VLSI signal processing system. IEEE Trans. Very Large Scale Integr. Syst. 1(4): 491-502 (1993) - [c3]Thomas P. Kelliher, Mary Jane Irwin:
A systolic VLSI architecture for multi-dimensional transforms. ICASSP (1) 1993: 365-368 - 1992
- [j1]Thomas P. Kelliher, Robert Michael Owens, Mary Jane Irwin, TingTing Hwang:
ELM-A Fast Addition Algorithm Discovered by a Program. IEEE Trans. Computers 41(9): 1181-1184 (1992) - [c2]Robert Michael Owens, Mary Jane Irwin, Thomas P. Kelliher, Mohan Vishwanath, Raminder Singh Bajwa:
Implementing a family of high performance, micrograined architectures. ASAP 1992: 191-205 - 1991
- [c1]Mary Jane Irwin, Robert Michael Owens, Thomas P. Kelliher, Kin-Ki Leung, Mohan Vishwanath:
The arithmetic cube II: a second generation VLSI DSP processor. ICASSP 1991: 1125-1128
Coauthor Index
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