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Jiang Wu 0017
Person information
Other persons with the same name
- Jiang Wu — disambiguation page
- Jiang Wu 0001 — University of Waterloo, School of Computer Science, Ontario, Canada (and 1 more)
- Jiang Wu 0002
— Southwestern University of Finance and Economics, School of Statistics, Chengdu, China
- Jiang Wu 0003
— Shanghai Artificial Intelligence Laboratory, Shanghai, China
- Jiang Wu 0004
- Jiang Wu 0005
- Jiang Wu 0006
- Jiang Wu 0007
- Jiang Wu 0008
- Jiang Wu 0009
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Journal Articles
- 2024
- [j7]Zhuo Zhang, Ya Li, Lei Xia, Jianxin Xue
, Jiang Wu
, Xiaoguang Mao
:
An effective fault localization approach for Verilog based on enhanced contexts. Frontiers Comput. Sci. 18(5): 185108 (2024) - [j6]Jiang Wu
, Zhuo Zhang
, Deheng Yang
, Jianjun Xu
, Jiayu He
, Xiaoguang Mao
:
Knowledge-Augmented Mutation-Based Bug Localization for Hardware Design Code. ACM Trans. Archit. Code Optim. 21(3): 45:1-45:26 (2024) - [j5]Jiang Wu
, Zhuo Zhang
, Deheng Yang
, Jianjun Xu
, Jiayu He
, Xiaoguang Mao
:
Time-Aware Spectrum-Based Bug Localization for Hardware Design Code with Data Purification. ACM Trans. Archit. Code Optim. 21(3): 64:1-64:25 (2024) - [j4]Deheng Yang
, Jiayu He
, Xiaoguang Mao
, Tun Li
, Yan Lei
, Xin Yi
, Jiang Wu
:
Strider: Signal Value Transition-Guided Defect Repair for HDL Programming Assignments. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(5): 1594-1607 (2024) - 2020
- [j3]Jiang Wu
, Jianjun Xu, Xiankai Meng
, Haoyu Zhang
, Zhuo Zhang, Long Li
:
Compilation Optimization Pass Selection Using Gate Graph Attention Neural Network for Reliability Improvement. IEEE Access 8: 150422-150434 (2020) - [j2]Jiang Wu
, Jianjun Xu, Xiankai Meng, Yan Lei:
A Highly Reliable Compilation Optimization Passes Sequence Generation Framework. IEICE Trans. Inf. Syst. 103-D(9): 1998-2002 (2020) - [j1]Jiang Wu, Jianjun Xu, Xiankai Meng, Haoyu Zhang, Zhuo Zhang:
Enabling Reliability-Driven Optimization Selection with Gate Graph Attention Neural Network. Int. J. Softw. Eng. Knowl. Eng. 30(11&12): 1641-1665 (2020)
Conference and Workshop Papers
- 2024
- [c5]Jianjun Xu, Jiang Wu
, Jiayu He, Deheng Yang, Xiaoguang Mao:
Simple but Powerful Beginning: Metamorphic Verification Framework for Cryptographic Hardware Design. ICPADS 2024: 126-131 - 2023
- [c4]Jiang Wu
, Yan Lei, Zhuo Zhang, Xiankai Meng, Deheng Yang, Pan Li, Jiayu He
, Xiaoguang Mao
:
Mantra: Mutation Testing of Hardware Design Code Based on Real Bugs. DAC 2023: 1-6 - [c3]Jianjun Xu
, Jiayu He
, Jingyan Zhang
, Deheng Yang
, Jiang Wu
, Xiaoguang Mao
:
Validating the Redundancy Assumption for HDL from Code Clone's Perspective. ISPD 2023: 247-255 - 2022
- [c2]Jiang Wu
, Zhuo Zhang, Deheng Yang, Xiankai Meng, Jiayu He
, Xiaoguang Mao
, Yan Lei:
Fault Localization for Hardware Design Code with Time-Aware Program Spectrum. ICCD 2022: 537-544 - 2020
- [c1]Jiang Wu, Jianjun Xu, Xiankai Meng, Zhuo Zhang, Nan Zhang, Haoyu Zhang:
High-Reliability Compilation Optimization Sequence Generation Framework Based ANN. QRS 2020: 347-355
Coauthor Index

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