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ORCIDTroy J. Beukema
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2020 – today
- 2023
[j15]Timothy O. Dickson
, Zeynep Toprak Deniz, Martin Cochet, Troy J. Beukema, Marcel A. Kossel, Thomas Morf, Young-Ho Choi, Pier Andrea Francese, Matthias Brändli, Christian W. Baks, Jonathan E. Proesel, John F. Bulzacchelli, Michael P. Beakes, Byoung-Joo Yoo, Hyoungbae Ahn, Dong-Hyuk Lim, Gunil Kang, Sang-Hune Park, Mounir Meghelli, Hyo-Gyuem Rhew, Daniel J. Friedman, Michael Choi, Mehmet Soyuer, Jongshin Shin:
A 72-GS/s, 8-Bit DAC-Based Wireline Transmitter in 4-nm FinFET CMOS for 200+ Gb/s Serial Links. IEEE J. Solid State Circuits 58(4): 1074-1086 (2023)- 2022
- [c13]Timothy O. Dickson, Zeynep Toprak Deniz, Martin Cochet, Marcel A. Kossel, Thomas Morf, Young-Ho Choi, Pier Andrea Francese, Matthias Brändli, Troy J. Beukema, Christian W. Baks, Jonathan E. Proesel, John F. Bulzacchelli, Michael P. Beakes, Byoung-Joo Yoo, Hyoungbae Ahn, Dong-Hyuk Lim, Gunil Kang, Sang-Hune Park, Mounir Meghelli, Hyo-Gyuem Rhew, Daniel J. Friedman, Michael Choi, Mehmet Soyuer, Jongshin Shin:
A 72GS/s, 8-bit DAC-based Wireline Transmitter in 4nm FinFET CMOS for 200+Gb/s Serial Links. VLSI Technology and Circuits 2022: 28-29 - [c12]Serdar S. Yonar, Pier Andrea Francese, Matthias Brändli, Marcel A. Kossel, Thomas Morf, Jonathan E. Proesel, Sergey V. Rylov, Herschel A. Ainspan, Martin Cochet, Zeynep Toprak Deniz, Timothy O. Dickson, Troy J. Beukema, Christian W. Baks, Michael P. Beakes, John F. Bulzacchelli, Young-Ho Choi, Byoung-Joo Yoo, Hyoungbae Ahn, Dong-Hyuk Lim, Gunil Kang, Sang-Hune Park, Mounir Meghelli, Hyo-Gyuem Rhew, Daniel J. Friedman, Michael Choi, Mehmet Soyuer, Jongshin Shin:
An 8-bit 56GS/s 64x Time-Interleaved ADC with Bootstrapped Sampler and Class-AB Buffer in 4nm CMOS. VLSI Technology and Circuits 2022: 168-169
2010 – 2019
- 2016
- [c11]Sergey V. Rylov, Troy J. Beukema, Zeynep Toprak Deniz, Thomas Toifl, Yong Liu, Ankur Agrawal, Peter Buchmann, Alexander V. Rylyakov, Michael P. Beakes, Benjamin D. Parker, Mounir Meghelli:
3.1 A 25Gb/s ADC-based serial line receiver in 32nm CMOS SOI. ISSCC 2016: 56-57 - 2014
- [j14]Gautam R. Gangasani, Chun-Ming Hsu, John F. Bulzacchelli, Troy J. Beukema, William R. Kelly, Hui H. Xu, David Freitas, Andrea Prati, Daniele Gardellini, Robert Reutemann, Giovanni Cervelli, Juergen Hertle, Matthew Baecher, Jon Garlett, Pier Andrea Francese, John F. Ewen, David Hanson, Daniel W. Storaska, Mounir Meghelli:
A 32 Gb/s Backplane Transceiver With On-Chip AC-Coupling and Low Latency CDR in 32 nm SOI CMOS Technology. IEEE J. Solid State Circuits 49(11): 2474-2489 (2014) - [c10]Thomas Toifl, Peter Buchmann, Troy J. Beukema, Michael P. Beakes, Matthias Braendli, Pier Andrea Francese, Christian Menolfi, Marcel A. Kossel, Lukas Kull, Thomas Morf:
A 3.5pJ/bit 8-tap-feed-forward 8-tap-decision feedback digital equalizer for 16Gb/s I/Os. ESSCIRC 2014: 455-458 - 2012
- [j13]Thomas Toifl, Christian Menolfi, Michael Ruegg, Robert Reutemann, Daniel Dreps, Troy J. Beukema, Andrea Prati, Daniele Gardellini, Marcel A. Kossel, Peter Buchmann, Matthias Braendli, Pier Andrea Francese, Thomas Morf:
A 2.6 mW/Gbps 12.5 Gbps RX With 8-Tap Switched-Capacitor DFE in 32 nm CMOS. IEEE J. Solid State Circuits 47(4): 897-910 (2012) - [j12]Gautam R. Gangasani, Chun-Ming Hsu, John F. Bulzacchelli, Sergey V. Rylov, Troy J. Beukema, David Freitas, William R. Kelly, Michael Shannon, Jieming Qi, Hui H. Xu, Joseph Natonio, Todd M. Rasmus, Jong-Ru Guo, Michael Wielgos, Jon Garlett, Michael Sorna, Mounir Meghelli:
A 16-Gb/s Backplane Transceiver With 12-Tap Current Integrating DFE and Dynamic Adaptation of Voltage Offset and Timing Drifts in 45-nm SOI CMOS Technology. IEEE J. Solid State Circuits 47(8): 1828-1841 (2012) - [j11]John F. Bulzacchelli, Christian Menolfi, Troy J. Beukema, Daniel W. Storaska, Juergen Hertle, David Hanson, Ping-Hsuan Hsieh, Sergey V. Rylov, Daniel Furrer, Daniele Gardellini, Andrea Prati, Thomas Morf, Vivek Sharma, Ram Kelkar, Herschel A. Ainspan, William R. Kelly, L. R. Chieco, Glenn Ritter, J. A. Sorice, Jon Garlett, Robert Callan, Matthias Braendli, Peter Buchmann, Marcel A. Kossel, Thomas Toifl, Daniel J. Friedman:
A 28-Gb/s 4-Tap FFE/15-Tap DFE Serial Link Transceiver in 32-nm SOI CMOS Technology. IEEE J. Solid State Circuits 47(12): 3232-3248 (2012) - [c9]Jean-Olivier Plouchart, Mihai A. T. Sanduleanu, Zeynep Toprak Deniz, Troy J. Beukema, Scott K. Reynolds, Benjamin D. Parker, Michael P. Beakes, José A. Tierno, Daniel J. Friedman:
A 3.2GS/s 4.55b ENOB two-step subranging ADC in 45nm SOI CMOS. CICC 2012: 1-4 - [c8]John F. Bulzacchelli, Troy J. Beukema, Daniel W. Storaska, Ping-Hsuan Hsieh, Sergey V. Rylov, Daniel Furrer, Daniele Gardellini, Andrea Prati, Christian Menolfi, David Hanson, Juergen Hertle, Thomas Morf, Vivek Sharma, Ram Kelkar, Herschel A. Ainspan, William R. Kelly, Glenn Ritter, Jon Garlett, Robert Callan, Thomas Toifl, Daniel J. Friedman:
A 28Gb/s 4-tap FFE/15-tap DFE serial link transceiver in 32nm SOI CMOS technology. ISSCC 2012: 324-326 - 2011
- [c7]Gautam R. Gangasani, Chun-Ming Hsu, John F. Bulzacchelli, Sergey V. Rylov, Troy J. Beukema, David Freitas, William R. Kelly, Michael Shannon, Jieming Qi, Hui H. Xu, Joseph Natonio, Todd M. Rasmus, Jong-Ru Guo, Michael Wielgos, Jon Garlett, Michael Sorna, Mounir Meghelli:
A 16-Gb/s backplane transceiver with 12-tap current integrating DFE and dynamic adaptation of voltage offset and timing drifts in 45-nm SOI CMOS technology. CICC 2011: 1-4 - 2010
- [j10]Troy J. Beukema:
Design considerations for high-data-rate chip interconnect systems. IEEE Commun. Mag. 48(10): 174-183 (2010)
2000 – 2009
- 2008
- [c6]Yasunao Katayama, Daiju Nakano, Alberto Valdes-Garcia, Troy J. Beukema, Scott K. Reynolds:
Multi-Gbps wireless systems over 60-GHz SiGe radio link with BW-efficient noncoherent detections. ICME 2008: 513-516 - 2007
- [c5]Yasunao Katayama, Chuck Haymes, Daiju Nakano, Troy J. Beukema, Brian A. Floyd, Scott K. Reynolds, Ullrich R. Pfeiffer, Brian P. Gaucher, Kai Schleupen:
2-Gbps Uncompressed HDTV Transmission over 60-GHz SiGe Radio Link. CCNC 2007: 12-16 - [c4]Alberto Valdes-Garcia, Scott K. Reynolds, Troy J. Beukema:
Multi-Mode Modulator and Frequency Demodulator Circuits for Gb/s Data Rate 60 GHz Wireless Transceivers. CICC 2007: 639-642 - 2006
- [j9]Scott K. Reynolds, Brian A. Floyd, Ullrich R. Pfeiffer, Troy J. Beukema, Janusz Grzyb, Chuck Haymes, Brian P. Gaucher, Mehmet Soyuer:
A Silicon 60-GHz Receiver and Transmitter Chipset for Broadband Communications. IEEE J. Solid State Circuits 41(12): 2820-2831 (2006) - [j8]John F. Bulzacchelli, Mounir Meghelli, Sergey V. Rylov, Woogeun Rhee, Alexander V. Rylyakov, Herschel A. Ainspan, Benjamin D. Parker, Michael P. Beakes, Aichin Chung, Troy J. Beukema, Petar K. Pepeljugoski, Lei Shan, Young Hoon Kwark, Sudhir M. Gowda, Daniel J. Friedman:
A 10-Gb/s 5-Tap DFE/4-Tap FFE Transceiver in 90-nm CMOS Technology. IEEE J. Solid State Circuits 41(12): 2885-2900 (2006) - [c3]Mounir Meghelli, Sergey V. Rylov, John F. Bulzacchelli, Woogeun Rhee, Alexander V. Rylyakov, Herschel A. Ainspan, Benjamin D. Parker, Michael P. Beakes, Aichin Chung, Troy J. Beukema, Petar K. Pepeljugoski, L. Shan, Young Hoon Kwark, Sudhir M. Gowda, Daniel J. Friedman:
A 10Gb/s 5-Tap-DFE/4-Tap-FFE Transceiver in 90nm CMOS. ISSCC 2006: 213-222 - [c2]Brian A. Floyd, Scott K. Reynolds, Ullrich R. Pfeiffer, Troy J. Beukema, Janus Grzyb, Chuck Haymes:
A silicon 60GHz receiver and transmitter chipset for broadband communications. ISSCC 2006: 649-658 - 2005
- [j7]Brian A. Floyd, Scott K. Reynolds, Ullrich R. Pfeiffer, Thomas Zwick, Troy J. Beukema, Brian P. Gaucher:
SiGe bipolar transceiver circuits operating at 60 GHz. IEEE J. Solid State Circuits 40(1): 156-167 (2005) - [j6]Troy J. Beukema, Michael Sorna, Karl Selander, Steven Zier, Brian L. Ji, Phil Murfet, James Mason, Woogeun Rhee, Herschel A. Ainspan, Benjamin D. Parker, Michael P. Beakes:
A 6.4-Gb/s CMOS SerDes core with feed-forward and decision-feedback equalization. IEEE J. Solid State Circuits 40(12): 2633-2645 (2005) - [j5]Scott K. Reynolds, Brian A. Floyd, Troy J. Beukema, Thomas Zwick, Ullrich R. Pfeiffer:
Design and Compliance Testing of a SiGe WCDMA Receiver IC With Integrated Analog Baseband. Proc. IEEE 93(9): 1624-1636 (2005) - [j4]Thomas Zwick, Troy J. Beukema, Haewoon Nam:
Wideband Channel Sounder With Measurements and Model for the 60 GHz Indoor Radio Channel. IEEE Trans. Veh. Technol. 54(4): 1266-1277 (2005) - [c1]Scott K. Reynolds, Brian A. Floyd, Ullrich R. Pfeiffer, Troy J. Beukema, Thomas Zwick, Janus Grzyb, Duixian Liu, Brian P. Gaucher:
Progress toward a low-cost millimeter-wave silicon radio. CICC 2005: 563-570 - 2003
- [j3]Scott K. Reynolds, Brian A. Floyd, Troy J. Beukema, Thomas Zwick, Ullrich R. Pfeiffer, Herschel A. Ainspan:
A direct-conversion receiver integrated circuit for WCDMA mobile systems. IBM J. Res. Dev. 47(2-3): 337-354 (2003) - [j2]Duixian Liu, Brian P. Gaucher, Ephraim B. Flint, Thomas W. Studwell, Hideyuki Usui, Troy J. Beukema:
Developing integrated antenna subsystems for laptop computers. IBM J. Res. Dev. 47(2-3): 355-367 (2003) - [j1]Scott K. Reynolds, Brian A. Floyd, Troy J. Beukema, Thomas Zwick, Ullrich R. Pfeiffer, Herschel A. Ainspan:
A direct-conversion receiver IC for WCDMA mobile systems. IEEE J. Solid State Circuits 38(9): 1555-1560 (2003)
Coauthor Index
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