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ORCIDYifan He 0002
Person information
- affiliation: Reconova Technologies Company Ltd., Xiamen, China
- affiliation (PhD 2013): Eindhoven University of Technology, Department of Electrical Engineering, Netherlands
- affiliation: NXP Semiconductors, Netherlands
Other persons with the same name
- Yifan He (aka: YiFan He, Yi-Fan He) — disambiguation page
- Yifan He 0001
![[0000-0002-9171-3502]](https://dblp.org/img/orcid-mark.12x12.png "0000-0002-9171-3502")
(aka: Maldini Yifan He) — Zhejiang University of Finance and Economics, Hangzhou, China (and 2 more) - Yifan He 0003 — Tsinghua University, Department of Electronic Engineering, Beijing, China
- Yifan He 0004 — Xi'an Jiaotong Univisity, School of Physics, Institute of Space Optics, China
- Yifan He 0005 — Fudan University, Shanghai Key Lab of Intelligent Information Processing, School of Computer Science, China
- Yifan He 0006 — New York University, Department of Computer Science, NY, USA
- Yifan He 0007 — Dublin City University, Centre for Next Generation Localisation, School of Computing, Ireland
- Yifan He 0008 — UNSW Sydney, Sydney, NSW, Australia
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2020 – today
- 2025
[j19]Zhihang Qian, Shengzhe Yan, Zhuoyu Dai, Zeyu Guo, Zhaori Cong, Yifan He, Chunmeng Dou, Feng Zhang, Jinshan Yue, Yongpan Liu:
An RRAM-Based Computing-in-Memory Macro With Low-Power Readout/Hold Circuits and Activation Differential Strategy for AdderNet. IEEE Trans. Very Large Scale Integr. Syst. 33(7): 2029-2033 (2025)- [c31]Changchun Zhou, Tianling Huang, Yanzhe Ma, Yuzhe Fu, Xiangjie Song, Siyuan Qiu, Jiacong Sun, Min Liu, Ge Li, Yifan He, Yuchao Yang, Hailong Jiao:
23.4 Nebula: A 28nm 109.8TOPS/W 3D PNN Accelerator Featuring Adaptive Partition, Multi-Skipping, and Block-Wise Aggregation. ISSCC 2025: 412-414 - 2024
- [j18]Jinshan Yue, Yongpan Liu, Xiaoyu Feng, Yifan He, Jingyu Wang, Zhe Yuan, Mingtao Zhan, Jiaxin Liu, Jian-Wei Su, Yen-Lin Chung, Ping-Chun Wu, Li-Yang Hong, Meng-Fan Chang, Nan Sun, Chunmeng Dou, Xueqing Li, Ming Liu, Huazhong Yang:
An Energy-Efficient Computing-in-Memory NN Processor With Set-Associate Blockwise Sparsity and Ping-Pong Weight Update. IEEE J. Solid State Circuits 59(5): 1612-1627 (2024) - [j17]Shengzhe Yan, Jinshan Yue, Chaojie He, Zi Wang, Zhaori Cong, Yifan He, Mufeng Zhou, Wenyu Sun, Xueqing Li, Chunmeng Dou, Feng Zhang, Huazhong Yang, Yongpan Liu, Ming Liu:
A 28-nm Floating-Point Computing-in-Memory Processor Using Intensive-CIM Sparse-Digital Architecture. IEEE J. Solid State Circuits 59(8): 2630-2643 (2024) - [j16]Changchun Zhou, Yuzhe Fu, Yanzhe Ma, Eryi Han, Yifan He, Hailong Jiao:
Adjustable Multi-Stream Block-Wise Farthest Point Sampling Acceleration in Point Cloud Analysis. IEEE Trans. Circuits Syst. II Express Briefs 71(7): 3523-3527 (2024) - [j15]Yuzhe Fu, Changchun Zhou, Tianling Huang, Eryi Han, Yifan He, Hailong Jiao:
SoftAct: A High-Precision Softmax Architecture for Transformers Supporting Nonlinear Functions. IEEE Trans. Circuits Syst. Video Technol. 34(9): 8912-8923 (2024) - [j14]Zhishan Li, Hongxu Chen, Battista Biggio, Yifan He, Haoran Cai, Fabio Roli, Lei Xie:
Toward Effective Traffic Sign Detection via Two-Stage Fusion Neural Networks. IEEE Trans. Intell. Transp. Syst. 25(8): 8283-8294 (2024) - [c30]Fengxiang Yang, Zhun Zhong, Zhiming Luo, Yifan He, Shaozi Li, Nicu Sebe:
Diversity-Authenticity Co-constrained Stylization for Federated Domain Generalization in Person Re-identification. AAAI 2024: 6477-6485 - [c29]Yingxin Lai, Guoqing Yang, Yifan He, Zhiming Luo, Shaozi Li:
Selective Domain-Invariant Feature for Generalizable Deepfake Detection. ICASSP 2024: 2335-2339 - [c28]Guoqing Yang, Jianzhe Gao, Kejia Zhang, Yifan He, Zhiming Luo, Shaozi Li:
A Collaborative Framework Using Multimodal Data and Adaptive Noise for Human Behavior Anomaly Detection. IJCNN 2024: 1-8 - [c27]Guoqing Yang, Zhiming Luo, Jianzhe Gao, Yingxin Lai, Kun Yang, Yifan He, Shaozi Li:
A Multilevel Guidance-Exploration Network and Behavior-Scene Matching Method for Human Behavior Anomaly Detection. ACM Multimedia 2024: 5865-5873 - [c26]Zhuoyu Dai, Shengzhe Yan, Zhaori Cong, Zeyu Guo, Yifan He, Wenyu Sun, Chunmeng Dou, Feng Zhang, Jinshan Yue, Yongpan Liu, Ming Liu:
A 41.7TOPS/W@INT8 Computing-in-Memory Processor with Zig-Zag Backbone-Systolic CIM and Block/Self-Gating CAM for NN/Recommendation Applications. VLSI Technology and Circuits 2024: 1-2 - [i1]Yingxin Lai, Guoqing Yang, Yifan He, Zhiming Luo, Shaozi Li:
Selective Domain-Invariant Feature for Generalizable Deepfake Detection. CoRR abs/2403.12707 (2024) - 2023
- [j13]Changchun Zhou, Min Liu, Siyuan Qiu, Xugang Cao, Yuzhe Fu, Yifan He, Hailong Jiao:
Sagitta: An Energy-Efficient Sparse 3D-CNN Accelerator for Real-Time 3-D Understanding. IEEE Internet Things J. 10(23): 20703-20717 (2023) - [j12]Ming Liu, Changchun Zhou, Siyuan Qiu, Yifan He, Hailong Jiao:
CNN Accelerator at the Edge With Adaptive Zero Skipping and Sparsity-Driven Data Flow. IEEE Trans. Circuits Syst. Video Technol. 33(12): 7084-7095 (2023) - [c25]Changchun Zhou, Yuzhe Fu, Min Liu, Siyuan Qiu, Ge Li, Yifan He, Hailong Jiao:
An Energy-Efficient 3D Point Cloud Neural Network Accelerator With Efficient Filter Pruning, MLP Fusion, and Dual-Stream Sampling. ICCAD 2023: 1-9 - [c24]Jinshan Yue, Chaojie He, Zi Wang, Zhaori Cong, Yifan He, Mufeng Zhou, Wenyu Sun, Xueqing Li, Chunmeng Dou, Feng Zhang, Huazhong Yang, Yongpan Liu, Ming Liu:
A 28nm 16.9-300TOPS/W Computing-in-Memory Processor Supporting Floating-Point NN Inference/Training with Intensive-CIM Sparse-Digital Architecture. ISSCC 2023: 252-253 - [c23]Jinshan Yue, Mingtao Zhan, Zi Wang, Yifan He, Yaolei Li, Songming Yu, Wenyu Sun, Lu Jie, Chunmeng Dou, Xueqing Li, Nan Sun, Huazhong Yang, Ming Liu, Yongpan Liu:
A 5.6-89.9TOPS/W Heterogeneous Computing-in-Memory SoC with High-Utilization Producer-Consumer Architecture and High-Frequency Read-Free CIM Macro. VLSI Technology and Circuits 2023: 1-2 - 2022
- [j11]Zhishan Li, Baozhi Jia, Yifan He, Lei Xie:
PBDE: an effective post-processing method based on box density for object detection. Appl. Intell. 52(3): 2930-2941 (2022) - [j10]Jinshan Yue, Yongpan Liu, Zhe Yuan, Xiaoyu Feng, Yifan He, Wenyu Sun, Zhixiao Zhang, Xin Si, Ruhui Liu, Zi Wang, Meng-Fan Chang, Chunmeng Dou, Xueqing Li, Ming Liu, Huazhong Yang:
STICKER-IM: A 65 nm Computing-in-Memory NN Processor Using Block-Wise Sparsity Optimization and Inter/Intra-Macro Data Reuse. IEEE J. Solid State Circuits 57(8): 2560-2573 (2022) - [c22]Ming Liu, Yifan He, Hailong Jiao:
An LUT-Based Multiplier Array for Systolic Array-Based Convolutional Neural Network Accelerator. APCCAS 2022: 55-59 - [c21]Zhishan Li, Mingmu Chen, Yifan He, Lei Xie, Hongye Su:
An Efficient Framework for Detection and Recognition of Numerical Traffic Signs. ICASSP 2022: 2235-2239 - 2021
- [j9]Zhishan Li, Yiran Sun, Guanzhong Tian, Lei Xie, Yong Liu, Hongye Su, Yifan He:
A compression pipeline for one-stage object detection model. J. Real Time Image Process. 18(6): 1949-1962 (2021) - [j8]Zhishan Li, Yiran Sun, Guanzhong Tian, Lei Xie, Yong Liu, Hongye Su, Yifan He:
Correction to: A compression pipeline for one-stage object detection model. J. Real Time Image Process. 18(6): 1963-1964 (2021) - [j7]Zhishan Li, Jiayan Yuan, Baozhi Jia, Yifan He, Lei Xie:
An Effective Face Anti-Spoofing Method via Stereo Matching. IEEE Signal Process. Lett. 28: 847-851 (2021) - [c20]Min Liu, Yifan He, Hailong Jiao:
Efficient Zero-Activation-Skipping for On-Chip Low-Energy CNN Acceleration. AICAS 2021: 1-4 - [c19]Changchun Zhou, Min Liu, Siyuan Qiu, Yifan He, Hailong Jiao:
An Energy-Efficient Low-Latency 3D-CNN Accelerator Leveraging Temporal Locality, Full Zero-Skipping, and Hierarchical Load Balance. DAC 2021: 241-246
2010 – 2019
- 2019
- [c18]Luc Waeijen, Savvas Sioutas, Yifan He, Maurice Peemen, Henk Corporaal:
Automatic Memory-Efficient Scheduling of CNNs. SAMOS 2019: 387-400 - 2018
- [j6]Hailong Jiao, Rui Wang, Yifan He:
Crosstalk-noise-aware bus coding with low-power ground-gated repeaters. Int. J. Circuit Theory Appl. 46(2): 280-289 (2018) - [c17]Luc Waeijen, Hailong Jiao, Henk Corporaal, Yifan He:
Datawidth-Aware Energy-Efficient Multipliers: A Case for Going Sign Magnitude. DSD 2018: 54-61 - 2016
- [c16]Tong Geng, Luc Waeijen, Maurice Peemen, Henk Corporaal, Yifan He:
MacSim: A MAC-Enabled High-Performance Low-Power SIMD Architecture. DSD 2016: 160-167 - [c15]Yifan He, Maurice Peemen, Luc Waeijen, Erkan Diken, Mattia Fiumara, Gerard K. Rauwerda, Henk Corporaal, Tong Geng:
A configurable SIMD architecture with explicit datapath for intelligent learning. SAMOS 2016: 156-163 - 2015
- [j5]Luc Waeijen, Dongrui She, Henk Corporaal, Yifan He:
A Low-Energy Wide SIMD Architecture with Explicit Datapath. J. Signal Process. Syst. 80(1): 65-86 (2015) - [j4]Dongrui She, Yifan He, Luc Waeijen, Henk Corporaal:
A Co-Design Framework with OpenCL Support for Low-Energy Wide SIMD Processor. J. Signal Process. Syst. 80(1): 87-101 (2015) - 2014
- [c14]Luc Waeijen, Dongrui She, Henk Corporaal, Yifan He:
Reduction Operator for Wide-SIMDs Reconsidered. DAC 2014: 108:1-108:6 - 2013
- [j3]Yifan He, Dongrui She, Sander Stuijk, Henk Corporaal:
Efficient communication support in predictable heterogeneous MPSoC designs for streaming applications. J. Syst. Archit. 59(10-A): 878-888 (2013) - [j2]Dongrui She, Yifan He, Henk Corporaal:
An energy-efficient method of supporting flexible special instructions in an embedded processor with compact ISA. ACM Trans. Archit. Code Optim. 10(3): 15:1-15:25 (2013) - [c13]Shakith Fernando, Mark Wijtvliet, Firew Siyoum, Yifan He, Sander Stuijk, Akash Kumar, Henk Corporaal:
MAMPSX: A demonstration of rapid, predictable HMPSOC synthesis. FPL 2013: 1 - [c12]Shakith Fernando, Firew Siyoum, Yifan He, Akash Kumar, Henk Corporaal:
MAMPSx: A design framework for rapid synthesis of predictable heterogeneous MPSoCs. RSP 2013: 136-142 - [c11]Dongrui She, Yifan He, Luc Waeijen, Henk Corporaal:
OpenCL code generation for low energy wide SIMD architectures with explicit datapath. ICSAMOS 2013: 322-329 - [c10]Luc Waeijen, Dongrui She, Henk Corporaal, Yifan He:
SIMD made explicit. ICSAMOS 2013: 330-337 - 2012
- [c9]Dongrui She, Yifan He, Henk Corporaal:
Energy efficient special instruction support in an embedded processor with compact isa. CASES 2012: 131-140 - [c8]Dongrui She, Yifan He, Bart Mesman, Henk Corporaal:
Scheduling for register file energy minimization in explicit datapath architectures. DATE 2012: 388-393 - 2011
- [j1]Yu Pu, Yifan He, Zhenyu Ye, Sebastian M. Londono, Anteneh A. Abbo, Richard P. Kleihorst, Henk Corporaal:
From Xetal-II to Xetal-Pro: On the Road Toward an Ultralow-Energy and High-Throughput SIMD Processor. IEEE Trans. Circuits Syst. Video Technol. 21(4): 472-484 (2011) - [c7]Yifan He, Zhenyu Ye, Dongrui She, Bart Mesman, Henk Corporaal:
Feasibility Analysis of Ultra High Frame Rate Visual Servoing on FPGA and SIMD Processor. ACIVS 2011: 623-634 - [c6]Zhenyu Ye, Yifan He, Roel Pieters, Bart Mesman, Henk Corporaal, Pieter Jonker:
Demo: An embedded vision system for high frame rate visual servoing. ICDSC 2011: 1-2 - [c5]Zhenyu Ye, Yifan He, Roel Pieters, Bart Mesman, Henk Corporaal, Pieter Jonker:
Bottlenecks and Tradeoffs in High Frame Rate Visual Servoing: A Case Study. MVA 2011: 55-58 - [c4]Yifan He, Dongrui She, Bart Mesman, Henk Corporaal:
MOVE-Pro: A low power and high code density TTA architecture. ICSAMOS 2011: 294-301 - 2010
- [c3]Yifan He, Yu Pu, Richard P. Kleihorst, Zhenyu Ye, Anteneh A. Abbo, Sebastian M. Londono, Henk Corporaal:
Xetal-Pro: an ultra-low energy and high throughput SIMD processor. DAC 2010: 543-548
2000 – 2009
- 2008
- [c2]Yifan He, Zoran Zivkovic, Richard P. Kleihorst, Alexander Danilin, Henk Corporaal, Bart Mesman:
Real-Time Hough Transform on 1-D SIMD Processors: Implementation and Architecture Exploration. ACIVS 2008: 254-265 - [c1]Yifan He, Zoran Zivkovic, Richard P. Kleihorst, Alexander Danilin, Henk Corporaal:
Real-time implementations of Hough Transform on SIMD architecture. ICDSC 2008: 1-8
Coauthor Index
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