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Yibin Yang 0001
Person information
- affiliation: Georgia Institute of Technology, Atlanta, GA, USA
Other persons with the same name
- Yibin Yang — disambiguation page
- Yibin Yang 0002 — South China University of Technology, Guangzhou, China
- Yibin Yang 0003 — Beijing City University, China
- Yibin Yang 0004 — Hunan University of Science and Technology, XiangTan, Hunan, China
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2020 – today
- 2024
- [c8]Ranjit Kumaresan, Duc Viet Le, Mohsen Minaei, Srinivasan Raghuraman, Yibin Yang, Mahdi Zamani:
Programmable Payment Channels. ACNS (3) 2024: 51-73 - [c7]Carmit Hazay, Yibin Yang:
Toward Malicious Constant-Rate 2PC via Arithmetic Garbling. EUROCRYPT (5) 2024: 401-431 - [c6]Yibin Yang, David Heath:
Two Shuffles Make a RAM: Improved Constant Overhead Zero Knowledge RAM. USENIX Security Symposium 2024 - [i11]Carmit Hazay, Yibin Yang:
Toward Malicious Constant-Rate 2PC via Arithmetic Garbling. IACR Cryptol. ePrint Arch. 2024: 283 (2024) - [i10]Yibin Yang, David Heath, Carmit Hazay, Vladimir Kolesnikov, Muthuramakrishnan Venkitasubramaniam:
Tight ZK CPU: Batched ZK Branching with Cost Proportional to Evaluated Instruction. IACR Cryptol. ePrint Arch. 2024: 456 (2024) - [i9]Carmit Hazay, David Heath, Vladimir Kolesnikov, Muthuramakrishnan Venkitasubramaniam, Yibin Yang:
LogRobin++: Optimizing Proofs of Disjunctive Statements in VOLE-Based ZK. IACR Cryptol. ePrint Arch. 2024: 1427 (2024) - 2023
- [c5]Srinivasan Raghuraman, Yibin Yang:
Just How Fair is an Unreactive World? ASIACRYPT (6) 2023: 420-450 - [c4]Yibin Yang, David Heath, Carmit Hazay, Vladimir Kolesnikov, Muthuramakrishnan Venkitasubramaniam:
Batchman and Robin: Batched and Non-batched Branching for Interactive ZK. CCS 2023: 1452-1466 - [c3]Yibin Yang, Stanislav Peceny, David Heath, Vladimir Kolesnikov:
Towards Generic MPC Compilers via Variable Instruction Set Architectures (VISAs). CCS 2023: 2516-2530 - [i8]Yibin Yang, Mohsen Minaei, Srinivasan Raghuraman, Ranjit Kumaresan, Mahdi Zamani:
Off-Chain Programmability at Scale. IACR Cryptol. ePrint Arch. 2023: 347 (2023) - [i7]Yibin Yang, Stanislav Peceny, David Heath, Vladimir Kolesnikov:
Towards Generic MPC Compilers via Variable Instruction Set Architectures (VISAs). IACR Cryptol. ePrint Arch. 2023: 953 (2023) - [i6]Yibin Yang, David Heath:
Two Shuffles Make a RAM: Improved Constant Overhead Zero Knowledge RAM. IACR Cryptol. ePrint Arch. 2023: 1115 (2023) - [i5]Yibin Yang, David Heath, Carmit Hazay, Vladimir Kolesnikov, Muthuramakrishnan Venkitasubramaniam:
Batchman and Robin: Batched and Non-batched Branching for Interactive ZK. IACR Cryptol. ePrint Arch. 2023: 1257 (2023) - [i4]Mohsen Minaei, Duc Viet Le, Ranjit Kumaresan, Andrew Beams, Pedro Moreno-Sanchez, Yibin Yang, Srinivasan Raghuraman, Panagiotis Chatzigiannis, Mahdi Zamani:
Scalable Off-Chain Auctions. IACR Cryptol. ePrint Arch. 2023: 1454 (2023) - 2022
- [c2]Yibin Yang, David Heath, Vladimir Kolesnikov, David Devecsery:
EZEE: Epoch Parallel Zero Knowledge for ANSI C. EuroS&P 2022: 109-123 - [i3]David Heath, Yibin Yang, David Devecsery, Vladimir Kolesnikov:
Zero Knowledge for Everything and Everyone: Fast ZK Processor with Cached RAM for ANSI C Programs. IACR Cryptol. ePrint Arch. 2022: 810 (2022) - [i2]Yibin Yang, David Heath, Vladimir Kolesnikov, David Devecsery:
EZEE: Epoch Parallel Zero Knowledge for ANSI C. IACR Cryptol. ePrint Arch. 2022: 811 (2022) - [i1]Srinivasan Raghuraman, Yibin Yang:
Just How Fair is an Unreactive World? IACR Cryptol. ePrint Arch. 2022: 1655 (2022) - 2021
- [c1]David Heath, Yibin Yang, David Devecsery, Vladimir Kolesnikov:
Zero Knowledge for Everything and Everyone: Fast ZK Processor with Cached ORAM for ANSI C Programs. SP 2021: 1538-1556
Coauthor Index
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last updated on 2024-10-07 01:26 CEST by the dblp team
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