BibTeX records: Thomas Y. Hoffmann

download as .bib file

@article{DBLP:journals/tvlsi/CrupiAFMKGMWH12,
  author    = {Felice Crupi and
               Massimo Alioto and
               Jacopo Franco and
               Paolo Magnone and
               Ben Kaczer and
               Guido Groeseneken and
               J{\'{e}}r{\^{o}}me Mitard and
               Liesbeth Witters and
               Thomas Y. Hoffmann},
  title     = {Buried Silicon-Germanium pMOSFETs: Experimental Analysis in {VLSI}
               Logic Circuits Under Aggressive Voltage Scaling},
  journal   = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume    = {20},
  number    = {8},
  pages     = {1487--1495},
  year      = {2012},
  url       = {https://doi.org/10.1109/TVLSI.2011.2159870},
  doi       = {10.1109/TVLSI.2011.2159870},
  timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/journals/tvlsi/CrupiAFMKGMWH12.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/CrupiAFMKGMWH11,
  author    = {Felice Crupi and
               Massimo Alioto and
               Jacopo Franco and
               Paolo Magnone and
               Ben Kaczer and
               Guido Groeseneken and
               J{\'{e}}r{\^{o}}me Mitard and
               Liesbeth Witters and
               Thomas Y. Hoffmann},
  title     = {Experimental analysis of buried SiGe pMOSFETs from the perspective
               of aggressive voltage scaling},
  booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2011), May
               15-19 2011, Rio de Janeiro, Brazil},
  pages     = {2249--2252},
  publisher = {{IEEE}},
  year      = {2011},
  url       = {https://doi.org/10.1109/ISCAS.2011.5938049},
  doi       = {10.1109/ISCAS.2011.5938049},
  timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
  biburl    = {https://dblp.org/rec/conf/iscas/CrupiAFMKGMWH11.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/esscirc/ChiarellaWMKDRO09,
  author    = {Thomas Chiarella and
               Liesbeth Witters and
               Abdelkarim Mercha and
               Christoph Kerner and
               Rok Dittrich and
               Michal Rakowski and
               Claude Ortolland and
               Lars{-}{\AA}ke Ragnarsson and
               Bertrand Parvais and
               A. De Keersgieter and
               S. Kubicek and
               A. Redolfi and
               R. Rooyackers and
               C. Vrancken and
               S. Brus and
               A. Lauwers and
               Philippe Absil and
               S. Biesemans and
               Thomas Y. Hoffmann},
  title     = {Migrating from planar to FinFET for further {CMOS} scaling: {SOI}
               or bulk?},
  booktitle = {35th European Solid-State Circuits Conference, {ESSCIRC} 2009, Athens,
               Greece, 14-18 September 2009},
  pages     = {84--87},
  publisher = {{IEEE}},
  year      = {2009},
  url       = {https://doi.org/10.1109/ESSCIRC.2009.5325993},
  doi       = {10.1109/ESSCIRC.2009.5325993},
  timestamp = {Mon, 22 Feb 2021 00:00:00 +0100},
  biburl    = {https://dblp.org/rec/conf/esscirc/ChiarellaWMKDRO09.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
a service of Schloss Dagstuhl - Leibniz Center for Informatics