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Tasuku Nishihara
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2010 – 2019
- 2011
- [j4]Tasuku Nishihara, Takeshi Matsumoto, Masahiro Fujita:
Multi-Level Bounded Model Checking with Symbolic Counterexamples. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 94-A(2): 696-705 (2011) - 2010
- [j3]Takeshi Matsumoto, Tasuku Nishihara, Masahiro Fujita:
Performance Estimation with Automatic False-Path Detection for System-Level Designs. IPSJ Trans. Syst. LSI Des. Methodol. 3: 69-80 (2010) - [c8]Masahiro Fujita, Hideo Tanida, Fei Gao, Tasuku Nishihara, Takeshi Matsumoto:
Synthesis and formal verification of on-chip protocol transducers through decomposed specification. ISQED 2010: 515-523
2000 – 2009
- 2009
- [j2]Tasuku Nishihara, Takeshi Matsumoto, Masahiro Fujita:
Word-Level Equivalence Checking in Bit-Level Accuracy by Synthesizing Designs onto Identical Datapath. IEICE Trans. Inf. Syst. 92-D(5): 972-984 (2009) - [c7]Yeonbok Lee, Tasuku Nishihara, Takeshi Matsumoto, Masahiro Fujita:
A Post-Silicon Debug Support Using High-Level Design Description. Asian Test Symposium 2009: 137-142 - 2008
- [c6]Yoshihisa Kojima, Tasuku Nishihara, Takeshi Matsumoto, Masahiro Fujita:
An Interactive Verification and Debugging Environment by Concrete/Symbolic Simulations for System-Level Designs. ATS 2008: 315-320 - [c5]Tasuku Nishihara, Takeshi Matsumoto, Masahiro Fujita:
Multi-level Bounded Model Checking to detect bugs beyond the bound. HLDVT 2008: 49-55 - 2007
- [j1]Shunsuke Sasaki, Tasuku Nishihara, Daisuke Ando, Masahiro Fujita:
Hardware/Software Co-design and Verification Methodology from System Level Based on System Dependence Graph. J. Univers. Comput. Sci. 13(13): 1972-2001 (2007) - [c4]Takeshi Matsumoto, Daisuke Ando, Tasuku Nishihara, Masahiro Fujita:
Development and Verification of a Collaborative Printing Environment. C5 2007: 99-108 - 2006
- [c3]Masahiro Fujita, Tasuku Nishihara, Daisuke Ando:
System LSI distributed collaborative design environment for both designers and CAD developers/engineers. C5 2006: 175-183 - [c2]Tasuku Nishihara, Takeshi Matsumoto, Masahiro Fujita:
Equivalence Checking with Rule-Based Equivalence Propagation and High-Level Synthesis. HLDVT 2006: 162-169 - 2005
- [c1]Shunsuke Sasaki, Tasuku Nishihara, Masahiro Fujita:
Slicing-based Hardware/Software Co-design Methodology From Functional Specifications. FSEN 2005: 265-280
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