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Hideki Saito 0001
Person information
- affiliation: Intel Corporation, Santa Clara, CA, USA
Other persons with the same name
- Hideki Saito 0002 — Forestry and Forest Products Research Institute, Tsukuba, Japan
- Hideki Saito 0003 — Japan Digital Equipment R&D Center, Ltd.
- Hideki Saito 0004 — Utsunomiya University, Japan
- Hideki Saito 0005 — Fujitsu Laboratories Ltd., System LSI Development Laboratories, Kawasaki, Japan
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2020 – today
- 2023
- [c27]Wenju He
, Yilong Guo
, Xinmin Tian
, Hideki Saito
, Wenwan Xing
, Feng Zou
, Chunyang Dai
, Maosu Zhao
, Haonan Yang
:
Streamline Ahead-of-Time SYCL CPU Device Implementation through Bypassing SPIR-V. IWOCL 2023: 28:1
2010 – 2019
- 2017
- [c26]Xinmin Tian, Hideki Saito, Ernesto Su, Jin Lin, Satish Guggilla, Diego Caballero, Matt Masten, Andrew Savonichev, Michael Rice, Elena Demikhovsky, Ayal Zaks, Gil Rapaport, Abhinav Gaba, Vasileios Porpodas, Eric N. Garcia:
LLVM Compiler Implementation for Explicit Parallelization and SIMD Vectorization. LLVM-HPC@SC 2017: 4:1-4:11 - 2016
- [c25]Hideki Saito, Serge Preis, Nikolay Panchenko, Xinmin Tian:
Reducing the Functionality Gap Between Auto-Vectorization and Explicit Vectorization - Compress/Expand and Histogram. IWOMP 2016: 173-186 - [c24]Xinmin Tian, Hideki Saito, Ernesto Su, Abhinav Gaba, Matt Masten, Eric N. Garcia, Ayal Zaks:
LLVM Framework and IR Extensions for Parallelization, SIMD Vectorization and Offloading. LLVM-HPC@SC 2016: 21-31 - 2015
- [j7]Nadathur Satish, Changkyu Kim, Jatin Chhugani, Hideki Saito, Rakesh Krishnaiyer, Mikhail Smelyanskiy, Milind Girkar, Pradeep Dubey:
Can traditional programming bridge the ninja performance gap for parallel computing applications? Commun. ACM 58(5): 77-86 (2015) - [j6]Xinmin Tian, Hideki Saito, Serguei Preis, Eric N. Garcia, Sergey Kozhukhov, Matt Masten, Aleksei G. Cherkasov, Nikolay Panchenko:
Effective SIMD Vectorization for Intel Xeon Phi Coprocessors. Sci. Program. 2015: 269764:1-269764:14 (2015) - 2013
- [c23]Xinmin Tian, Hideki Saito, Serguei Preis, Eric N. Garcia, Sergey Kozhukhov, Matt Masten, Aleksei G. Cherkasov, Nikolay Panchenko:
Practical SIMD Vectorization Techniques for Intel® Xeon Phi Coprocessors. IPDPS Workshops 2013: 1149-1158 - [c22]Rakesh Krishnaiyer, Emre Kultursay, Pankaj Chawla, Serguei Preis, Anatoly Zvezdin, Hideki Saito:
Compiler-Based Data Prefetching and Streaming Non-temporal Store Generation for the Intel(R) Xeon Phi(TM) Coprocessor. IPDPS Workshops 2013: 1575-1586 - 2012
- [c21]Xinmin Tian, Hideki Saito, Milind Girkar, Serguei Preis, Sergey Kozhukhov, Aleksei G. Cherkasov, Clark Nelson, Nikolay Panchenko, Robert Geva:
Compiling C/C++ SIMD Extensions for Function and Loop Vectorizaion on Multicore-SIMD Processors. IPDPS Workshops 2012: 2349-2358 - [c20]Nadathur Satish, Changkyu Kim, Jatin Chhugani, Hideki Saito, Rakesh Krishnaiyer, Mikhail Smelyanskiy, Milind Girkar, Pradeep Dubey:
Can traditional programming bridge the Ninja performance gap for parallel computing applications? ISCA 2012: 440-451 - [c19]Michael Klemm, Alejandro Duran, Xinmin Tian, Hideki Saito, Diego Caballero, Xavier Martorell
:
Extending OpenMP* with Vector Constructs for Modern Multicore SIMD Architectures. IWOMP 2012: 59-72 - 2010
- [j5]Matthias S. Müller
, G. Matthijs van Waveren, Ron Lieberman, Brian Whitney, Hideki Saito, Kalyan Kumaran, John Baron, William C. Brantley, Chris Parrott, Tom Elken, Huiyu Feng, Carl Ponder:
SPEC MPI2007 - an application benchmark suite for parallel systems using MPI. Concurr. Comput. Pract. Exp. 22(2): 191-205 (2010) - [c18]Arun Kejariwal, Milind Girkar, Xinmin Tian, Hideki Saito, Alexandru Nicolau, Alexander V. Veidenbaum, Utpal Banerjee, Constantine D. Polychronopoulos:
Exploitation of nested thread-level speculative parallelism on multi-core systems. Conf. Computing Frontiers 2010: 99-100 - [c17]Arun Kejariwal, Milind Girkar, Xinmin Tian, Hideki Saito, Alexandru Nicolau, Alexander V. Veidenbaum, Utpal Banerjee, Constantine D. Polychronopoulos:
On the efficacy of call graph-level thread-level speculation. WOSP/SIPEW 2010: 247-248
2000 – 2009
- 2009
- [j4]Arun Kejariwal, Alexander V. Veidenbaum, Alexandru Nicolau, Milind Girkar, Xinmin Tian, Hideki Saito:
On the exploitation of loop-level parallelism in embedded applications. ACM Trans. Embed. Comput. Syst. 8(2): 10:1-10:34 (2009) - 2008
- [c16]Arun Kejariwal, Alexander V. Veidenbaum, Alexandru Nicolau, Xinmin Tian, Milind Girkar, Hideki Saito, Utpal Banerjee:
Comparative architectural characterization of SPEC CPU2000 and CPU2006 benchmarks on the intel® CoreTM 2 Duo processor. ICSAMOS 2008: 132-141 - 2006
- [c15]Arun Kejariwal, Alexander V. Veidenbaum, Alexandru Nicolau, Milind Girkar, Xinmin Tian, Hideki Saito:
Challenges in exploitation of loop parallelism in embedded applications. CODES+ISSS 2006: 173-180 - [c14]Milind Girkar, Arun Kejariwal, Xinmin Tian, Hideki Saito, Alexandru Nicolau, Alexander V. Veidenbaum, Constantine D. Polychronopoulos:
Probablistic Self-Scheduling. Euro-Par 2006: 253-264 - [c13]Arun Kejariwal, Xinmin Tian, Wei Li, Milind Girkar, Sergey Kozhukhov, Hideki Saito, Utpal Banerjee, Alexandru Nicolau, Alexander V. Veidenbaum, Constantine D. Polychronopoulos:
On the performance potential of different types of speculative thread-level parallelism: The DL version of this paper includes corrections that were not made available in the printed proceedings. ICS 2006: 24 - [c12]Arun Kejariwal, Hideki Saito, Xinmin Tian, Milind Girkar, Wei Li, Utpal Banerjee, Alexandru Nicolau, Constantine D. Polychronopoulos:
Lightweight lock-free synchronization methods for multithreading. ICS 2006: 361-371 - [c11]Arun Kejariwal, Alexandru Nicolau, Hideki Saito, Xinmin Tian, Milind Girkar, Utpal Banerjee, Constantine D. Polychronopoulos:
A general approach for partitioning N-dimensional parallel nested loops with conditionals. SPAA 2006: 49-58 - 2005
- [j3]Xinmin Tian, Milind Girkar, Aart J. C. Bik, Hideki Saito:
Practical Compiler Techniques on Efficient Multithreaded Code Generation for OpenMP Programs. Comput. J. 48(5): 588-601 (2005) - [c10]Xinmin Tian, Rakesh Krishnaiyer, Hideki Saito, Milind Girkar, Wei Li:
Impact of Compiler-based Data-Prefetching Techniques on SPEC OMP Application Performance. IPDPS 2005 - 2003
- [j2]Hideki Saito, Greg Gaertner, Wesley B. Jones, Rudolf Eigenmann, Hidetoshi Iwashita, Ron Lieberman, G. Matthijs van Waveren, Brian Whitney:
Large System Performance of SPEC OMP Benchmark Suites. Int. J. Parallel Program. 31(3): 197-209 (2003) - 2002
- [c9]Rudolf Eigenmann, Greg Gaertner, Wesley B. Jones, Hideki Saito, Brian Whitney:
SPEC HPC2002: The Next High-Performance Computer Benchmark. ISHPC 2002: 7-10 - [c8]Hideki Saito, Greg Gaertner, Wesley B. Jones, Rudolf Eigenmann, Hidetoshi Iwashita, Ron Lieberman, G. Matthijs van Waveren, Brian Whitney:
Large System Performance of SPEC OMP2001 Benchmarks. ISHPC 2002: 370-379 - 2000
- [j1]Hideki Saito, Nicholas Stavrakos, Constantine D. Polychronopoulos, Alexandru Nicolau:
The Design of the PROMIS Compiler-Towards Multi-Level Parallelization. Int. J. Parallel Program. 28(2): 195-212 (2000)
1990 – 1999
- 1999
- [c7]Hideki Saito, Nicholas Stavrakos, Steven Carroll, Constantine D. Polychronopoulos, Alexandru Nicolau:
The Design of the PROMIS Compiler. CC 1999: 214-228 - [c6]Hideki Saito, Nicholas Stavrakos, Constantine D. Polychronopoulos:
Multithreading Runtime Support for Loop and Functional Parallelism. ISHPC 1999: 133-144 - [c5]Nicholas Stavrakos, Steven Carroll, Hideki Saito, Constantine D. Polychronopoulos, Alexandru Nicolau:
Symbolic Analysis in the PROMIS Compiler. LCPC 1999: 468-471 - 1996
- [c4]Hideki Saito, Constantine D. Polychronopoulos:
sigma-SSA and Its Construction Through Symbolic Interpretation. LCPC 1996: 585-587 - 1995
- [c3]Tsuneo Nakanishi, Kazuki Joe, Hideki Saito, Akira Fukuda, Keijiro Araki:
The CDP2 Partitioning Algorithm a Combined End Program Partitioning Algorithm on the Data Partitioning Graph. ICPP (2) 1995: 177-181 - 1994
- [c2]Tsuneo Nakanishi, Kazuki Joe, Akira Fukuda, Keijiro Araki, Hideki Saito, Constantine D. Polychronopoulos:
The Data Partitioning Graph: Extending Data and Control Dependencies for Data Partitioning. LCPC 1994: 170-185 - 1993
- [c1]Shin-ichiro Mori, Hideki Saito, Masahiro Goshima, Mamoru Yanagihara, Takashi Tanaka, David Fraser, Kazuki Joe, Hiroyuki Nitta, Shinji Tomita:
A distributed shared memory multiprocessor ASURA: memory and cache architecture. SC 1993: 740-749
Coauthor Index
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