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2020 – today
- 2024
[j13]Nesara Eranna Bethur
, Anthony Agnesina, Moritz Brunion, Alberto García Ortiz, Francky Catthoor, Dragomir Milojevic, Manu Komalan, Matheus A. Cavalcante, Samuel Riedel, Luca Benini, Sung Kyu Lim:
Hier-3D: A Methodology for Physical Hierarchy Exploration of 3-D ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(7): 1957-1970 (2024)- [c38]Sudipta Das, Samuel Riedel, Marco Bertuletti, Luca Benini, Moritz Brunion, Julien Ryckaert, James Myers, Dwaipayan Biswas, Dragomir Milojevic:
3D Partitioning with Pipeline Optimization for Low-Latency Memory Access in Many-Core SoCs. ISCAS 2024: 1-5 - [c37]Mohamed Naeim, Herman Oprins, Sudipta Das, Geert Van der Plas, Yun Dai, Pinhong Chen, CT Kao, Dwaipayan Biswas, Dragomir Milojevic:
Thermal Analysis of 3D Stacking and BEOL Technologies with Functional Partitioning of Many-Core RISC-V SoC. ISVLSI 2024: 33-38 - 2023
- [j12]Quentin Delhaye, Eric Beyne, Joël Goossens, Geert Van der Plas, Dragomir Milojevic:
Impact of gate-level clustering on automated system partitioning of 3D-ICs. Microelectron. J. 139: 105896 (2023) - [c36]Mohamed Naeim, Hanqi Yang, Pinhong Chen, Rong Bao, Antoine Dekeyser, Giuliano Sisto, Moritz Brunion, Rongmei Chen, Geert Van der Plas, Eric Beyne, Dragomir Milojevic:
Design Enablement of 3-Dies Stacked 3D-ICs Using Fine-Pitch Hybrid-Bonding and TSVs. 3DIC 2023: 1-4 - [i3]Quentin Delhaye, Eric Beyne, Joël Goossens, Geert Van der Plas, Dragomir Milojevic:
Impact of gate-level clustering on automated system partitioning of 3D-ICs. CoRR abs/2307.09308 (2023) - 2022
- [j11]Giuliano Sisto, Odysseas Zografos, Bilal Chehab, Naveen Kakarla, Yang Xiang, Dragomir Milojevic, Pieter Weckx, Geert Hellings, Julien Ryckaert:
Evaluation of Nanosheet and Forksheet Width Modulation for Digital IC Design in the Sub-3-nm Era. IEEE Trans. Very Large Scale Integr. Syst. 30(10): 1497-1506 (2022) - [c35]Matheus A. Cavalcante, Anthony Agnesina, Samuel Riedel, Moritz Brunion, Alberto García-Ortiz, Dragomir Milojevic, Francky Catthoor, Sung Kyu Lim, Luca Benini:
MemPool-3D: Boosting Performance and Efficiency of Shared-L1 Memory Many-Core Clusters with 3D Integration. DATE 2022: 394-399 - [c34]Nicolas Potvin, Hugues Bersini, Dragomir Milojevic:
Espresso to the rescue of genetic programming facing exponential complexity. GECCO Companion 2022: 590-593 - [c33]Anthony Agnesina, Moritz Brunion, Alberto García Ortiz, Francky Catthoor, Dragomir Milojevic, Manu Komalan, Matheus A. Cavalcante, Samuel Riedel, Luca Benini, Sung Kyu Lim:
Hier-3D: A Hierarchical Physical Design Methodology for Face-to-Face-Bonded 3D ICs. ISLPED 2022: 15:1-15:6 - [c32]Rongmei Chen, Giuliano Sisto, Odysseas Zografos, Dragomir Milojevic, Pieter Weckx, Geert Van der Plas, Eric Beyne:
Opportunities of Chip Power Integrity and Performance Improvement through Wafer Backside (BS) Connection: Invited Paper. SLIP 2022: 3:1-3:5 - [c31]Rongmei Chen, Giuliano Sisto, Michele Stucchi, Anne Jourdain, Kenichi Miyaguchi, Pieter Schuddinck, P. Woeltgens, H. Lin, Naveen Kakarla, Anabela Veloso, Dragomir Milojevic, Odysseas Zografos, Pieter Weckx, Geert Hellings, Geert Van der Plas, Julien Ryckaert, Eric Beyne:
Backside PDN and 2.5D MIMCAP to Double Boost 2D and 3D ICs IR-Drop beyond 2nm Node. VLSI Technology and Circuits 2022: 429-430 - 2021
- [j10]Gaurav Sharma, Georgios Bousdras, Soultana Ellinidou, Olivier Markowitch, Jean-Michel Dricot, Dragomir Milojevic:
Exploring the security landscape: NoC-based MPSoC to Cloud-of-Chips. Microprocess. Microsystems 84: 103963 (2021) - [j9]Lingjun Zhu, Lennart Bamberg, Sai Surya Kiran Pentapati, Kyungwook Chang, Francky Catthoor, Dragomir Milojevic, Manu Komalan, Brian Cline, Saurabh Sinha, Xiaoqing Xu, Alberto García-Ortiz, Sung Kyu Lim:
High-Performance Logic-on-Memory Monolithic 3-D IC Designs for Arm Cortex-A Processors. IEEE Trans. Very Large Scale Integr. Syst. 29(6): 1152-1163 (2021) - [c30]Anthony Agnesina, Moritz Brunion, Jinwoo Kim, Alberto García Ortiz, Dragomir Milojevic, Francky Catthoor, Manu Perumkunnil, Sung Kyu Lim:
Power, Performance, Area and Cost Analysis of Memory-on-Logic Face-to-Face Bonded 3D Processor Designs. ISLPED 2021: 1-6 - [c29]Giuliano Sisto, Rongmei Chen, Richard Chou, Geert Van der Plas, Eric Beyne, Rod Metcalfe, Dragomir Milojevic:
Design And Sign-off Methodologies For Wafer-To-Wafer Bonded 3D-ICs At Advanced Nodes (invited). SLIP 2021: 17-23 - [i2]Matheus A. Cavalcante, Anthony Agnesina, Samuel Riedel, Moritz Brunion, Alberto García-Ortiz, Dragomir Milojevic, Francky Catthoor, Sung Kyu Lim, Luca Benini:
MemPool-3D: Boosting Performance and Efficiency of Shared-L1 Memory Many-Core Clusters with 3D Integration. CoRR abs/2112.01168 (2021) - 2020
- [j8]Lingjun Zhu, Lennart Bamberg, Anthony Agnesina, Francky Catthoor, Dragomir Milojevic, Manu Komalan, Julien Ryckaert, Alberto García-Ortiz, Sung Kyu Lim:
Heterogeneous 3D Integration for a RISC-V System With STT-MRAM. IEEE Comput. Archit. Lett. 19(1): 51-54 (2020)
2010 – 2019
- 2019
- [c28]Giuliano Sisto, Peter Debacker, Rongmei Chen, Geert Van der Plas, Richard Chou, Eric Beyne, Dragomir Milojevic:
Design Enablement of Fine Pitch Face-to-Face 3D System Integration using Die-by-Die Place & Route. 3DIC 2019: 1-4 - [c27]Quentin Delhaye, Dragomir Milojevic, Joël Goossens:
3D-Stacked Integrated Circuits: How Fine Should System Partitioning Be? ISCAS 2019: 1-5 - 2018
- [c26]Georgios Bousdras, François Quitin, Dragomir Milojevic:
Template architectures for highly scalable, many-core Heterogeneous SoC: Could-of-Chips. ReCoSoC 2018: 1-7 - 2017
- [c25]Luca Mattii, Dragomir Milojevic, Peter Debacker, Yasser Sherazi, Mladen Berekovic, Praveen Raghavan:
IR-drop aware Design & technology co-optimization for N5 node with different device and cell height options. ICCAD 2017: 89-94 - 2016
- [c24]Oscar Palomar, Santhosh Kumar Rethinagiri, Gulay Yalcin, J. Rubén Titos Gil, Pablo Prieto, Emma Torrella, Osman S. Unsal, Adrián Cristal, Pascal Felber, Anita Sobe, Yaroslav Hayduk, Mascha Kurpicz, Christof Fetzer, Thomas Knauth, Malte Schneegaß, Jens Struckmeier, Dragomir Milojevic:
Energy minimization at all layers of the data center: The ParaDIME project. DATE 2016: 684-689 - [c23]Bon Woong Ku, Peter Debacker, Dragomir Milojevic, Praveen Raghavan, Sung Kyu Lim:
How much cost reduction justifies the adoption of monolithic 3D ICs at 7nm node? ICCAD 2016: 87 - [c22]Bon Woong Ku, Peter Debacker, Dragomir Milojevic, Praveen Raghavan, Diederik Verkest, Aaron Thean, Sung Kyu Lim:
Physical Design Solutions to Tackle FEOL/BEOL Degradation in Gate-level Monolithic 3D ICs. ISLPED 2016: 76-81 - [c21]Gulay Yalcin, Santhosh Kumar Rethinagiri, Oscar Palomar, Osman S. Ünsal, Adrián Cristal, Dragomir Milojevic:
Exploring Energy Reduction in Future Technology Nodes via Voltage Scaling with Application to 10nm. PDP 2016: 184-191 - 2015
- [j7]Santhosh Kumar Rethinagiri, Oscar Palomar, Anita Sobe, Gulay Yalcin, Thomas Knauth, J. Rubén Titos Gil, Pablo Prieto, Malte Schneegaß, Adrián Cristal, Osman S. Unsal, Pascal Felber, Christof Fetzer, Dragomir Milojevic:
ParaDIME: Parallel Distributed Infrastructure for Minimization of Energy for data centers. Microprocess. Microsystems 39(8): 1174-1189 (2015) - 2014
- [j6]Prashant Agrawal, Dragomir Milojevic, Praveen Raghavan, Francky Catthoor, Liesbet Van der Perre, Eric Beyne, Ravi Varadarajan:
System Level Comparison of 3D Integration Technologies for Future Mobile MPSoC Platform. IEEE Embed. Syst. Lett. 6(4): 85-88 (2014) - [c20]Yannick Allard, Geoffrey Nelissen, Joël Goossens, Dragomir Milojevic:
A context aware cache controller to bridge the gap between theory and practice in real-time systems. RTCSA 2014: 1-10 - [e1]Jari Nurmi, Peeter Ellervee, Dragomir Milojevic, Ondrej Daniel, Tommi Paakki:
2014 International Symposium on System-on-Chip, SoC 2014, Tampere, Finland, October 28-29, 2014. IEEE 2014, ISBN 978-1-4799-6890-9 [contents] - 2013
- [c19]Dragomir Milojevic, Pol Marchal, Erik Jan Marinissen, Geert Van der Plas, Diederik Verkest, Eric Beyne:
Design issues in heterogeneous 3D/2.5D integration. ASP-DAC 2013: 403-410 - [c18]Marco Casale-Rossi, Patrick Leduc, Giovanni De Micheli, Patrick Blouet, Brendan Farley, Anna Fontanelli, Dragomir Milojevic, Steve Smith:
Panel: "will 3D-IC remain a technology of the future... even in the future?". DATE 2013: 1526-1530 - 2012
- [c17]Geoffrey Nelissen, Vandy Berten, Vincent Nélis, Joël Goossens, Dragomir Milojevic:
U-EDF: An Unfair But Optimal Multiprocessor Scheduling Algorithm for Sporadic Tasks. ECRTS 2012: 13-23 - [c16]Geoffrey Nelissen, Vandy Berten, Joël Goossens, Dragomir Milojevic:
Techniques Optimizing the Number of Processors to Schedule Multi-threaded Tasks. ECRTS 2012: 321-330 - [c15]Dragomir Milojevic, Sachin Idgunji, Djordje Jevdjic, Emre Ozer, Pejman Lotfi-Kamran, Andreas Panteli, Andreas Prodromou, Chrysostomos Nicopoulos, Damien Hardy, Babak Falsafi, Yiannakis Sazeides:
Thermal characterization of cloud workloads on a power-efficient server-on-chip. ICCD 2012: 175-182 - 2011
- [j5]Geoffrey Nelissen, Shelby H. Funk, Joël Goossens, Dragomir Milojevic:
Swapping to reduce preemptions and migrations in EKG. SIGBED Rev. 8(3): 36-39 (2011) - [j4]Roberto Airoldi, Tapani Ahonen, Fabio Garzia, Dragomir Milojevic, Jari Nurmi:
Implementation of W-CDMA Cell Search on a Highly Parallel and Scalable MPSoC. J. Signal Process. Syst. 64(1): 137-148 (2011) - [c14]Dragomir Milojevic, Herman Oprins, Julien Ryckaert, Paul Marchal, Geert Van der Plas:
DRAM-on-logic Stack - Calibrated thermal and mechanical models integrated into PathFinding flow. CICC 2011: 1-4 - [c13]Geert Eneman, J. Cho, V. Moroz, Dragomir Milojevic, M. Choi, Kristin De Meyer, Abdelkarim Mercha, Eric Beyne, Thomas Hoffmann, Geert Van der Plas:
An analytical compact model for estimation of stress in multiple Through-Silicon Via configurations. DATE 2011: 505-506 - [c12]Geoffrey Nelissen, Vandy Berten, Joël Goossens, Dragomir Milojevic:
Reducing Preemptions and Migrations in Real-Time Multiprocessor Scheduling Algorithms by Releasing the Fairness. RTCSA (1) 2011: 15-24 - 2010
- [c11]Alienor Richard, Dragomir Milojevic, Frédéric Robert, Alexandros Bartzas, Antonis Papanikolaou, Kostas Siozios, Dimitrios Soudris:
Fast Design Space Exploration Environment Applied on NoC's for 3D-Stacked MPSoC's. ARCS Workshops 2010: 319-324 - [c10]Nguyen Anh Vu Doan, Frédéric Robert, Yves De Smet, Dragomir Milojevic:
MCDA-based methodology for efficient 3D-design space exploration and decision. SoC 2010: 76-83
2000 – 2009
- 2009
- [j3]Dragomir Milojevic, Luc J. M. Montperrus, Diederik Verkest:
Power Dissipation of the Network-on-Chip in Multi-Processor System-on-Chip Dedicated for Video Coding Applications. J. Signal Process. Syst. 57(2): 139-153 (2009) - [c9]Dragomir Milojevic, Trevor E. Carlson, Kris Croes, Riko Radojcic, Diana F. Ragett, Dirk Seynhaeve, Federico Angiolini, Geert Van der Plas, Paul Marchal:
Automated Pathfinding tool chain for 3D-stacked integrated circuits: Practical case study. 3DIC 2009: 1-6 - [c8]Dragomir Milojevic, Riko Radojcic, Roger Carpenter, Pol Marchal:
Pathfinding: A design methodology for fast exploration and optimisation of 3D-stacked integrated circuits. SoC 2009: 118-123 - [c7]Roberto Airoldi, Fabio Garzia, Tapani Ahonen, Dragomir Milojevic, Jari Nurmi:
Implementation of W-CDMA Cell Search on a FPGA Based Multi-Processor System-on-Chip with Power Management. SAMOS 2009: 88-97 - [c6]Fabio Garzia, Roberto Airoldi, Tapani Ahonen, Jari Nurmi, Dragomir Milojevic:
Implementation of the W-CDMA cell search on a MPSOC designed for software defined radios. SiPS 2009: 030-035 - 2008
- [j2]Markus Rupp, Dragomir Milojevic, Guy Gogniat:
Design and Architectures for Signal and Image Processing. EURASIP J. Embed. Syst. 2008 (2008) - [j1]Anthony Leroy, Dragomir Milojevic, Diederik Verkest, Frédéric Robert, Francky Catthoor:
Concepts and Implementation of Spatial Division Multiplexing for Guaranteed Throughput in Networks-on-Chip. IEEE Trans. Computers 57(9): 1182-1195 (2008) - [c5]Joël Goossens, Dragomir Milojevic, Vincent Nélis:
Power-Aware Real-Time Scheduling upon Dual CPU Type Multiprocessor Platforms. OPODIS 2008: 388-407 - [c4]Alexis Vander Biest, Alienor Richard, Dragomir Milojevic, Frédéric Robert:
A Multi-objective and Hierarchical Exploration Tool for SoC Performance Estimation. SAMOS 2008: 85-95 - [c3]Vincent Nélis, Joël Goossens, Raymond R. Devillers, Dragomir Milojevic, Nicolas Navet:
Power-Aware Real-Time Scheduling upon Identical Multiprocessor Platforms. SUTC 2008: 209-216 - 2007
- [c2]Alexis Vander Biest, Alienor Richard, Dragomir Milojevic, Frédéric Robert:
A Framework Introducing Model Reversibility in SoC Design Space Exploration. SAMOS 2007: 211-221 - [i1]Vincent Nélis, Joël Goossens, Nicolas Navet, Raymond R. Devillers, Dragomir Milojevic:
Power-Aware Real-Time Scheduling upon Identical Multiprocessor Platforms. CoRR abs/0712.2958 (2007) - 2005
- [c1]Dragomir Milojevic:
Implementation of Ranking Filters on General Purpose and Reconfigurable Architecture Based on High Density FPGA Devices. FPL 2005: 602-605
Coauthor Index
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last updated on 2024-10-02 20:44 CEST by the dblp team
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