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ORCIDMazad S. Zaveri
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2020 – today
- 2024
[c8]Yagnik M. Bhavsar, Mazad S. Zaveri
, Mehul S. Raval, Shaheriar B. Zaveri:
U-UTM: A Cyber-Physical System for Road Traffic Monitoring Using UAVs. ICVES 2024: 1-6- 2023
- [j6]Ankur Changela, Mazad Zaveri, Yogesh Kumar:
A New Angle Set-Based Absolute Scaling-free Reconfigurable Cordic Algorithm. Circuits Syst. Signal Process. 42(12): 7404-7432 (2023) - [j5]Ankur Changela, Mazad Zaveri, Deepak Verma:
A Comparative Study on CORDIC Algorithms and Applications. J. Circuits Syst. Comput. 32(5): 2330002:1-2330002:47 (2023) - 2021
- [j4]Ankur Changela, Mazad Zaveri, Deepak Verma:
Mixed-radix, virtually scaling-free CORDIC algorithm based rotator for DSP applications. Integr. 78: 70-83 (2021) - 2020
- [j3]Ankur Changela, Mazad Zaveri, Deepak Verma:
FPGA implementation of high-performance, resource-efficient Radix-16 CORDIC rotator based FFT algorithm. Integr. 73: 89-100 (2020) - [c7]Mehul S. Raval, Tolga Kaya, Mazad Zaveri, Paawan Sharma:
Experiments with Multinational Cross-Course Project. TALE 2020: 570-575
2010 – 2019
- 2019
- [j2]Manan Mewada, Mazad Zaveri, Rajesh Amratlal Thakker:
Improving the performance of transmission gate and hybrid CMOS Full Adders in chain and tree structure architectures. Integr. 69: 381-392 (2019) - 2018
- [c6]Ankur Changela, Mazad Zaveri, Anurag Lakhlani:
ASIC Implementation of High Performance Radix-8 CORDIC Algorithm. ICACCI 2018: 699-705 - 2017
- [c5]Manan Mewada, Mazad Zaveri, Anurag Lakhlani:
Estimating the Maximum Propagation Delay of 4-bit Ripple Carry Adder Using Reduced Input Transitions. VDAT 2017: 15-23 - 2016
- [c4]Manan Mewada, Mazad Zaveri:
An input test pattern for characterization of a full-adder and n-bit ripple carry adder. ICACCI 2016: 250-255 - [c3]Manan Mewada, Mazad Zaveri:
A low-power high-speed hybrid full adder. VDAT 2016: 1-2 - 2011
- [j1]Mazad S. Zaveri, Dan W. Hammerstrom:
Performance/price estimates for cortex-scale hardware: A design space exploration. Neural Networks 24(3): 291-304 (2011)
2000 – 2009
- 2008
- [c2]Dan Hammerstrom, Mazad Zaveri:
Bayesian Memory, a Possible Hardware Building Block for Intelligent Systems. AAAI Fall Symposium: Biologically Inspired Cognitive Architectures 2008: 81 - [c1]Changjian Gao, Mazad S. Zaveri, Dan W. Hammerstrom:
CMOS / CMOL architectures for spiking cortical column. IJCNN 2008: 2441-2448
Coauthor Index
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