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Weirong Jiang
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2020 – today
- 2024
- [c41]Sisi Wen
, Anubhavnidhi Abhashkumar
, Chenyang Zhao
, Weirong Jiang
:
Scaling Data Plane Verification via Parallelization. APNet 2024: 81-87 - [c40]Zhaoyu Gao, Anubhavnidhi Abhashkumar, Zhen Sun, Weirong Jiang, Yi Wang:
Crescent: Emulating Heterogeneous Production Network at Scale. NSDI 2024 - [c39]Haopei Wang, Anubhavnidhi Abhashkumar, Changyu Lin, Tianrong Zhang, Xiaoming Gu, Ning Ma, Chang Wu, Songlin Liu, Wei Zhou, Yongbin Dong, Weirong Jiang, Yi Wang:
NetAssistant: Dialogue Based Network Diagnosis in Data Center Networks. NSDI 2024
2010 – 2019
- 2015
- [r1]Weirong Jiang, Viktor K. Prasanna:
Network Virtualization in Data Centers: A Data Plane Perspective. Handbook on Data Centers 2015: 327-349 - 2014
- [j7]Gordon J. Brebner
, Weirong Jiang:
High-Speed Packet Processing using Reconfigurable Computing. IEEE Micro 34(1): 8-18 (2014) - [j6]Baohua Yang, Jeffrey Fong, Weirong Jiang, Yibo Xue, Jun Li:
Practical Multituple Packet Classification Using Dynamic Discrete Bit Selection. IEEE Trans. Computers 63(2): 424-434 (2014) - [j5]Thilan Ganegedara, Weirong Jiang, Viktor K. Prasanna:
A Scalable and Modular Architecture for High-Performance Packet Classification. IEEE Trans. Parallel Distributed Syst. 25(5): 1135-1144 (2014) - [c38]Shijie Zhou, Weirong Jiang, Viktor K. Prasanna:
A flexible and scalable high-performance OpenFlow switch on heterogeneous SoC platforms. IPCCC 2014: 1-8 - [c37]Shijie Zhou, Weirong Jiang, Viktor K. Prasanna:
A programmable and scalable openflow switch using heterogeneous soc platforms. HotSDN 2014: 239-240 - 2013
- [j4]Weirong Jiang
, Viktor K. Prasanna:
Data Structure Optimization for Power- Efficient IP Lookup Architectures. IEEE Trans. Computers 62(11): 2169-2182 (2013) - [c36]Weirong Jiang:
Scalable Ternary Content Addressable Memory implementation using FPGAs. ANCS 2013: 71-82 - 2012
- [j3]Weirong Jiang
, Viktor K. Prasanna:
Scalable Packet Classification on FPGA. IEEE Trans. Very Large Scale Integr. Syst. 20(9): 1668-1680 (2012) - [c35]Jeffrey Fong, Xiang Wang, Yaxuan Qi, Jun Li, Weirong Jiang:
ParaSplit: A Scalable Architecture on FPGA for Terabit Packet Classification. Hot Interconnects 2012: 1-8 - 2011
- [j2]Shuping Liu, Shushan Zhao, Weirong Jiang:
A Framework for Security-Enhanced Peer-to-Peer Applications in Mobile Cellular Networks. Int. J. Commun. Netw. Syst. Sci. 4(7): 456-463 (2011) - [c34]Hoang Le, Weirong Jiang
, Viktor K. Prasanna:
Memory-Efficient IPv4/v6 Lookup on FPGAs Using Distance-Bounded Path Compression. FCCM 2011: 242-249 - [c33]Thilan Ganegedara, Weirong Jiang
, Viktor K. Prasanna:
Multiroot: Towards Memory-Efficient Router Virtualization. ICC 2011: 1-5 - [c32]Yaxuan Qi, Kai Wang, Jeffrey Fong, Yibo Xue, Jun Li, Weirong Jiang
, Viktor K. Prasanna:
FEACAN: Front-end acceleration for content-aware network processing. INFOCOM 2011: 2114-2122 - [c31]Wei Jian, Yufeng Chen, Weirong Jiang, Zhengtao Xiang, Yubing Jian:
An Improved Information Feedback Strategy for Symmetrical Two-Route Traffic Flow Model. UKSim 2011: 382-386 - [i1]Weirong Jiang, Hoang Le, Viktor K. Prasanna:
Bidirectional Pipelining for Scalable IP Lookup and Packet Classification. CoRR abs/1107.5372 (2011) - 2010
- [c30]Weirong Jiang
, Maya B. Gokhale:
Real-Time Classification of Multimedia Traffic Using FPGA. FPL 2010: 56-63 - [c29]Weirong Jiang
, Viktor K. Prasanna, Norio Yamagaki:
Decision Forest: A Scalable Architecture for Flexible Flow Matching on FPGA. FPL 2010: 394-399 - [c28]Qingbo Wang, Weirong Jiang
, Yinglong Xia, Viktor K. Prasanna:
A message-passing multi-softcore architecture on FPGA for Breadth-first Search. FPT 2010: 70-77 - [c27]Yaxuan Qi, Jeffrey Fong, Weirong Jiang
, Bo Xu, Jun Li, Viktor K. Prasanna:
Multi-dimensional packet classification on FPGA: 100 Gbps and beyond. FPT 2010: 241-248 - [c26]Weirong Jiang
, Yaxuan Qi:
Power-Aware Parallel Forwarding: An Optimization Study. GreenCom/CPSCom 2010: 268-275 - [c25]Weirong Jiang
, Viktor K. Prasanna:
Architecture-aware data structure optimization for green IP lookup. HPSR 2010: 113-118 - [c24]Thilan Ganegedara, Weirong Jiang
, Viktor K. Prasanna:
FRuG: A benchmark for packet forwarding in future networks. IPCCC 2010: 231-238 - [c23]Weirong Jiang
, Yi-Hua Edward Yang, Viktor K. Prasanna:
Scalable multi-pipeline architecture for high performance multi-pattern string matching. IPDPS 2010: 1-12
2000 – 2009
- 2009
- [j1]Weirong Jiang
, Viktor K. Prasanna:
Sequence-preserving parallel IP lookup using multiple SRAM-based pipelines. J. Parallel Distributed Comput. 69(9): 778-789 (2009) - [c22]Weirong Jiang
, Viktor K. Prasanna:
A FPGA-based Parallel Architecture for Scalable High-Speed Packet Classification. ASAP 2009: 24-31 - [c21]Yun Zhu, Weirong Jiang
:
Load-aware bidirectional pipeline construction for terabit IP forwarding. CISS 2009: 701-706 - [c20]Weirong Jiang
, Viktor K. Prasanna:
Large-scale wire-speed packet classification on FPGAs. FPGA 2009: 219-228 - [c19]Weirong Jiang
, Viktor K. Prasanna:
Energy-Efficient Multi-Pipeline Architecture for Terabit Packet Classification. GLOBECOM 2009: 1-6 - [c18]Weirong Jiang
, Viktor K. Prasanna:
Scalable Packet Classification: Cutting or Merging? ICCCN 2009: 1-6 - [c17]Weirong Jiang
, Viktor K. Prasanna:
Reducing dynamic power dissipation in pipelined forwarding engines. ICCD 2009: 144-149 - [c16]Yufeng Chen, Zhengtao Xiang, Wei Jian, Weirong Jiang:
A Cross-Layer AOMDV Routing Protocol for V2V Communication in Urban VANET. MSN 2009: 353-359 - [c15]Weirong Jiang
, Viktor K. Prasanna:
Field-split parallel architecture for high performance multi-match packet classification using FPGAs. SPAA 2009: 188-196 - 2008
- [c14]Yi-Hua E. Yang, Weirong Jiang
, Viktor K. Prasanna:
Compact architecture for high-throughput regular expression matching on FPGA. ANCS 2008: 30-39 - [c13]Weirong Jiang
, Viktor K. Prasanna:
Multi-terabit ip lookup using parallel bidirectional pipelines. Conf. Computing Frontiers 2008: 241-250 - [c12]Hoang Le, Weirong Jiang
, Viktor K. Prasanna:
A SRAM-based Architecture for Trie-based IP Lookup Using FPGA. FCCM 2008: 33-42 - [c11]Hoang Le, Weirong Jiang
, Viktor K. Prasanna:
Scalable high-throughput SRAM-based architecture for IP-lookup using FPGA. FPL 2008: 137-142 - [c10]Weirong Jiang
, Viktor K. Prasanna:
Multi-Way Pipelining for Power-Efficient IP Lookup. GLOBECOM 2008: 2339-2343 - [c9]Weirong Jiang, Qingbo Wang, Viktor K. Prasanna:
Beyond TCAMs: An SRAM-Based Parallel Multi-Pipeline Architecture for Terabit IP Lookup. INFOCOM 2008: 1786-1794 - [c8]Weirong Jiang
, Viktor K. Prasanna:
Towards Green Routers: Depth-Bounded Multi-Pipeline Architecture for Power-Efficient IP Lookup. IPCCC 2008: 185-192 - [c7]Weirong Jiang
, Viktor K. Prasanna:
Parallel IP lookup using multiple SRAM-based pipelines. IPDPS 2008: 1-14 - 2007
- [c6]Weirong Jiang
, Viktor K. Prasanna:
A Memory-Balanced Linear Pipeline Architecture for Trie-based IP Lookup. Hot Interconnects 2007: 83-90 - [c5]Zhiming Zhang, Weirong Jiang
, Yibo Xue:
A Trust Model Based Cooperation Enforcement Mechanism in Mesh Networks. ICN 2007: 28 - [c4]Weirong Jiang
, Yun Zhu, Zhiming Zhang:
Routing Overhead Minimization in Large-Scale Wireless Mesh Networks. VTC Spring 2007: 1270-1274 - [c3]Weirong Jiang
, Zhiming Zhang, Xiaofeng Zhong:
High Throughput Routing in Large-Scale Multi-Radio Wireless Mesh Networks. WCNC 2007: 3598-3602 - 2006
- [c2]Weirong Jiang
, Chao Zhang:
A portable real-time emulator for testing multi-radio MANETs. IPDPS 2006 - 2005
- [c1]Weirong Jiang:
Data Structure Optimization of AS_PATH in BGP. ICCNMC 2005: 781-788
Coauthor Index
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last updated on 2024-07-20 20:27 CEST by the dblp team
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