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2010 – 2019
- 2017
[j2]Prabhat Mishra
, Ronny Morad, Avi Ziv, Sandip Ray:
Post-Silicon Validation in the SoC Era: A Tutorial Introduction. IEEE Des. Test 34(3): 68-92 (2017)- [c15]Farimah Farahmandi, Ronny Morad, Avi Ziv, Ziv Nevo, Prabhat Mishra:
Cost-effective analysis of post-silicon functional coverage events. DATE 2017: 392-397 - 2016
- [c14]Doowon Lee, Tom Kolan, Arkadiy Morgenshtein, Vitali Sokhin, Ronny Morad, Avi Ziv, Valeria Bertacco:
Probabilistic bug-masking analysis for post-silicon tests in microprocessor verification. DAC 2016: 24:1-24:6 - [c13]George Papadimitriou, Dimitris Gizopoulos, Athanasios Chatzidimitriou, Tom Kolan, Anatoly Koyfman, Ronny Morad, Vitali Sokhin:
Unveiling difficult bugs in address translation caching arrays for effective post-silicon validation. ICCD 2016: 544-551 - [c12]George Papadimitriou, Athanasios Chatzidimitriou, Dimitris Gizopoulos, Ronny Morad:
ISA-independent post-silicon validation for the address translation mechanisms of modern microprocessors. IOLTS 2016: 72-77 - 2015
- [j1]Klaus-Dieter Schubert, John M. Ludden, Salma Ayub, J. Behrend, Bishop Brock, Fady Copty, S. M. German, Oz Hershkovitz, H. Horbach, Jonathan R. Jackson, K. Keuerleber, J. Koesters, L. S. Leitner, G. B. Meil, Charles Meissner, Ronny Morad, Amir Nahir, Viresh Paruthi, Richard D. Peterson, Randall R. Pratt, Michal Rimon, John Schumann:
Solutions to IBM POWER8 verification challenges. IBM J. Res. Dev. 59(1) (2015) - 2014
- [c11]Rolf Drechsler, Christophe Chevallaz, Franco Fummi, Alan J. Hu, Ronny Morad, Frank Schirrmeister, Alex Goryachev:
Panel: Future SoC verification methodology: UVM evolution or revolution? DATE 2014: 1-5 - [c10]Chang-Hong Hsu, Debapriya Chatterjee, Ronny Morad, Raviv Gal, Valeria Bertacco:
ArChiVED: Architectural checking via event digests for high performance validation. DATE 2014: 1-6 - 2013
- [c9]Tali Rabetti, Ronny Morad, Alex Goryachev, Wisam Kadry, Richard D. Peterson:
SLAM: SLice And Merge - Effective Test Generation for Large Systems. Haifa Verification Conference 2013: 151-165 - [c8]Debapriya Chatterjee, Biruk Mammo, Doowon Lee, Raviv Gal, Ronny Morad, Amir Nahir, Avi Ziv, Valeria Bertacco:
Hybrid checking for microarchitectural validation of microprocessor designs on acceleration platforms. ICCAD 2013: 311-317 - 2012
- [c7]Debapriya Chatterjee, Anatoly Koyfman, Ronny Morad, Avi Ziv, Valeria Bertacco:
Checking architectural outputs instruction-by-instruction on acceleration platforms. DAC 2012: 955-961 - [c6]Biruk Mammo, Debapriya Chatterjee, Dmitry Pidan, Amir Nahir, Avi Ziv, Ronny Morad, Valeria Bertacco:
Approximating checkers for simulation acceleration. DATE 2012: 153-158 - [c5]Bashir M. Al-Hashimi, Ronny Morad:
Accelerators and emulators: Can they become the platform of choice for hardware verification? DATE 2012: 430 - 2011
- [c4]Wisam Kadry, Ronny Morad, Alex Goryachev, Eli Almog, Christopher A. Krygowski:
Facing the challenge of new design features: an effective verification approach. DAC 2011: 842-847 - 2010
- [c3]Yoav Hollander, Alan J. Hu, João Lourenço, Ronny Morad:
Special Session on Debugging. Haifa Verification Conference 2010: 24-28 - [c2]Eyal Bin, Alaa Ghanayim, Karen Holtz, Eitan Marcus, Ronny Morad, Ofer Peled, Michal Rimon, Gil Shurek, Elena Tsanko:
Ontology-Based Tools in the Service of Hardware Verification. SEKE 2010: 303-308
2000 – 2009
- 2008
- [c1]Torsten Schober, Shimon Landa, Bodo Hoppe, Ronny Morad:
IBM system z functional and performance verification using X-Gen. HLDVT 2008: 93-100
Coauthor Index
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