VHDL fault simulation for defect-oriented test and diagnosis of digital ICs.

Mon, 01 Jan 1996 00:00:00 +0100

João Paulo Teixeira, F. Celeiro, L. Dias, J. Ferreira, Marcelino B. Santos:
VHDL fault simulation for defect-oriented test and diagnosis of digital ICs. EURO-DAC 1996: 450-455