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2020 – today
- 2023
[c21]Thanh-Hai Nguyen, Olivier Héron, Olivier Riou:
Towards Privacy-first Manufacturing Data Exchange Platform. SoICT 2023: 801-807
2010 – 2019
- 2019
- [c20]Chiara Sandionigi, Olivier Héron:
Estimation of oxide breakdown effects by fault injection. IOLTS 2019: 269-274 - 2017
- [c19]Chiara Sandionigi, Maurício Altieri, Olivier Héron:
Early estimation of aging in the design flow of integrated circuits through a programmable hardware module. DFT 2017: 1-6 - 2016
- [c18]Boukary Ouattara, Olivier Héron, Chiara Sandionigi:
Fine-grain analysis of the parameters involved in aging of digital circuits. IOLTS 2016: 51-53 - [c17]Maurício Altieri, Suzanne Lesecq, Edith Beigné
, Olivier Héron, Diego Puschini:
Tracking BTI and HCI effects at circuit-level in adaptive systems. NEWCAS 2016: 1-4 - 2015
- [c16]Chiara Sandionigi, Olivier Héron:
Identifying aging-aware representative paths in processors. IOLTS 2015: 32-33 - [c15]Olivier Héron, Chiara Sandionigi, E. Piriou, Safa Mbarek, Vincent Huard:
Workload-dependent BTI analysis in a processor core at high level. IRPS 2015: 6 - [c14]Maurício Altieri, Suzanne Lesecq, Diego Puschini, Olivier Héron, Edith Beigné, Jorge Rodas:
Evaluation and mitigation of aging effects on a digital on-chip voltage and temperature sensor. PATMOS 2015: 111-117 - 2013
- [j4]Olivier Héron, Clement Bertolini, Chiara Sandionigi, Nicolas Ventroux, François Marc:
On the Simulation of HCI-Induced Variations of IC Timings at High Level. J. Electron. Test. 29(2): 127-141 (2013) - [c13]Chiara Sandionigi, Olivier Héron, Clement Bertolini, Raphaël David:
When processors get old: Evaluation of BTI and HCI effects on performance and reliability. IOLTS 2013: 185-186 - 2012
- [j3]Tushar Gupta, Clement Bertolini, Olivier Héron, Nicolas Ventroux, Thomas Zimmer, François Marc:
Impact of Power Consumption and Temperature on Processor Lifetime Reliability. J. Low Power Electron. 8(1): 83-94 (2012) - [c12]Clement Bertolini, Olivier Héron, Nicolas Ventroux, François Marc:
Relation between HCI-induced performance degradation and applications in a RISC processor. IOLTS 2012: 67-72 - 2011
- [c11]M. Alexandre Carbon, Olivier Héron, Karim Ben Chehida, Raphaël David:
Impact of power management on temperature and reliability evolution for an embedded many-core architecture. ARCS Workshops 2011 - [c10]Abdellah Kouadri, Olivier Héron, Romain Montagné:
A Lightweight API for an Adaptive Software Fault Tolerance Using POSIX-Thread Replication. ARCS Workshops 2011 - [c9]Julien Guilhemsang, Olivier Héron, Nicolas Ventroux, Olivier Goncalves, Alain Giulieri:
Impact of the application activity on intermittent faults in embedded systems. VTS 2011: 191-196 - 2010
- [c8]Olivier Héron, Julien Guilhemsang, Nicolas Ventroux, Alain Giulieri:
Analysis of on-line self-testing policies for real-time embedded multiprocessors in DSM technologies. IOLTS 2010: 49-55 - [c7]Tushar Gupta, Clement Bertolini, Olivier Héron, Nicolas Ventroux, Thomas Zimmer, François Marc:
High Level Power and Energy Exploration Using ArchC. SBAC-PAD 2010: 25-32
2000 – 2009
- 2006
- [j2]Patrick Girard, Olivier Héron, Serge Pravossoudovitch, Michel Renovell:
An Efficient BIST Architecture for Delay Faults in the Logic Cells of Symmetrical SRAM-Based FPGAs. J. Electron. Test. 22(2): 161-172 (2006) - 2005
- [j1]Patrick Girard, Olivier Héron, Serge Pravossoudovitch, Michel Renovell:
Delay Fault Testing of Look-Up Tables in SRAM-Based FPGAs. J. Electron. Test. 21(1): 43-55 (2005) - [c6]Olivier Héron, Talal Arnaout, Hans-Joachim Wunderlich:
On the Reliability Evaluation of SRAM-Based FPGA Designs. FPL 2005: 403-408 - 2004
- [c5]Patrick Girard, Olivier Héron, Serge Pravossoudovitch, Michel Renovell:
High Quality TPG for Delay Faults in Look-Up Tables of FPGAs. DELTA 2004: 83-88 - [c4]Patrick Girard, Olivier Héron, Serge Pravossoudovitch, Michel Renovell:
Manufacturing-oriented testing of delay faults in the logic architecture of symmetrical FPGAs. ETS 2004: 52-57 - [c3]Patrick Girard, Olivier Héron, Serge Pravossoudovitch, Michel Renovell:
BIST of Delay Faults in the Logic Architecture of Symmetrical FPGAs. IOLTS 2004: 187-192 - 2003
- [c2]Patrick Girard, Olivier Héron, Serge Pravossoudovitch, Michel Renovell:
Requirements for delay testing of look-up tables in SRAM-based FPGAs. ETW 2003: 147-152 - [c1]Patrick Girard, Olivier Héron, Serge Pravossoudovitch, Michel Renovell:
Defect Analysis for Delay-Fault BIST in FPGAs. IOLTS 2003: 124-128
Coauthor Index
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