Timing yield improvement of FPGAs utilizing enhanced architectures and multiple configurations under process variation (abstract only).

Sun, 01 Jan 2012 00:00:00 +0100

Fatemeh Sadat Pourhashemi, Morteza Saheb Zamani:
Timing yield improvement of FPGAs utilizing enhanced architectures and multiple configurations under process variation (abstract only). FPGA 2012: 265