BibTeX records: Roan Nicholson

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@inproceedings{DBLP:conf/asscc/LiSCWTGJNISLCTV18,
  author    = {Shenggao Li and
               Fulvio Spagna and
               Ji Chen and
               Xiaoqing Wang and
               Luke Tong and
               Sujatha Gowder and
               Wenyan Jia and
               Roan Nicholson and
               Sitaraman Iyer and
               Rui Song and
               Lily Li and
               Meng{-}hung Chen and
               Amanda Tran and
               Michael De Vita and
               Deepar Govindrajan and
               Marcus Pasquarella and
               Dave Bradley and
               Frank Verdico and
               Matt Duwe and
               Eric Lee and
               Michelle Wigton},
  title     = {A Power and Area Efficient 2.5-16 Gbps Gen4 PCIe {PHY} in 10nm FinFET
               {CMOS}},
  booktitle = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2018, Tainan,
               Taiwan, November 5-7, 2018},
  pages     = {5--8},
  publisher = {{IEEE}},
  year      = {2018},
  url       = {https://doi.org/10.1109/ASSCC.2018.8579314},
  doi       = {10.1109/ASSCC.2018.8579314},
  timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl    = {https://dblp.org/rec/conf/asscc/LiSCWTGJNISLCTV18.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/LiKHNJ11,
  author    = {Shenggao Li and
               Ashwin Krishnakumar and
               Edward Helder and
               Roan Nicholson and
               Vivian Jia},
  title     = {Clock generation for a 32nm server processor with scalable cores},
  booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2011,
               Digest of Technical Papers, San Francisco, CA, USA, 20-24 February,
               2011},
  pages     = {82--83},
  publisher = {{IEEE}},
  year      = {2011},
  url       = {https://doi.org/10.1109/ISSCC.2011.5746229},
  doi       = {10.1109/ISSCC.2011.5746229},
  timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl    = {https://dblp.org/rec/conf/isscc/LiKHNJ11.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isscc/SpagnaCDFGGIKKKLMNOPPRTTWZ10,
  author    = {Fulvio Spagna and
               Lidong Chen and
               Mamatha Deshpande and
               Yongping Fan and
               Doug Gambetta and
               Sujatha Gowder and
               Sitaraman Iyer and
               Rohit Kumar and
               Peter Kwok and
               Renuka Krishnamurthy and
               Chien{-}chun Lin and
               Ravindran Mohanavelu and
               Roan Nicholson and
               Jeff Ou and
               Marcus Pasquarella and
               Kavitha Prasad and
               Hendra Rustam and
               Luke Tong and
               Amanda Tran and
               John Wu and
               Xuguang Zhang},
  title     = {A 78mW 11.8Gb/s serial link transceiver with adaptive {RX} equalization
               and baud-rate {CDR} in 32nm {CMOS}},
  booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2010,
               Digest of Technical Papers, San Francisco, CA, USA, 7-11 February,
               2010},
  pages     = {366--367},
  publisher = {{IEEE}},
  year      = {2010},
  url       = {https://doi.org/10.1109/ISSCC.2010.5433823},
  doi       = {10.1109/ISSCC.2010.5433823},
  timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl    = {https://dblp.org/rec/conf/isscc/SpagnaCDFGGIKKKLMNOPPRTTWZ10.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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