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ORCIDZhiyuan Li 0001
Person information
- affiliation: Purdue University, Department of Computer Science, West Lafayette, IN, USA
- affiliation (PhD 1989): University of Illinois at Urbana-Champaign, IL, USA
Other persons with the same name
- Zhiyuan Li (aka: Zhi-yuan Li) — disambiguation page
- Zhiyuan Li 0002
![[0000-0002-6088-8086]](https://dblp.org/img/orcid-mark.12x12.png "0000-0002-6088-8086")
(aka: Zhi-yuan Li 0002) — Jiangsu University, School of Computer Science and Communication Engineering, Zhenjiang, China (and 1 more) - Zhiyuan Li 0003 (aka: Zhi-yuan Li 0003) — Inner Mongolia University of Technology, Department of Mathematics, Hohhot, China
- Zhiyuan Li 0004 — BNU-HKBU United International College, Zhuhai, China (and 1 more)
- Zhiyuan Li 0005 — Toyota Technological Institute at Chicago (TTIC), IL, USA (and 2 more)
- Zhiyuan Li 0006 — University of South Carolina, Department of Computer Science and Engineering, Columbia, SC, USA
- Zhiyuan Li 0007 — Rochester Institute of Technology, Rochester, NY, USA
- Zhiyuan Li 0008 — Motorola, Schaumburg, IL, USA (and 1 more)
- Zhiyuan Li 0009 — Wuhan University, School of Information Management, Wuhan, China
- Zhiyuan Li 0010 — University of Illinois at Urbana-Champaign, Department of Mechanical Science and Engineering, Urbana, IL, USA
- Zhiyuan Li 0011 — University of Cincinnati, Department of Electrical Engineering and Computer Science, Cincinnati, OH, USA (and 1 more)
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2020 – today
- 2021
[i1]Chao Zhang, Lifeng Wang, Zhijun Shen, Zhiyuan Li, Igor Menshov:
A reduced model for compressible viscous heat-conducting multicomponent flows. CoRR abs/2108.08225 (2021)
2010 – 2019
- 2018
- [c63]Hou-Jen Ko, Zhiyuan Li, Samuel P. Midkiff:
Optimizing data layout and system configuration on FPGA-based heterogeneous platforms. ICCAD 2018: 119 - 2017
- [j30]Xingjing Lu, Long Chen, Zhiyuan Li:
Performance Evaluation and Enhancement of Process-Based Parallel Loop Execution. Int. J. Parallel Program. 45(1): 185-198 (2017) - [j29]Feng Li, Zhiyuan Li, Wei Huo, Xiaobing Feng:
Locating Software Faults Based on Minimum Debugging Frontier Set. IEEE Trans. Software Eng. 43(8): 760-776 (2017) - 2016
- [j28]Ye Wang, Zhiyuan Li:
GridFOR: A Domain Specific Language for Parallel Grid-Based Applications. Int. J. Parallel Program. 44(3): 427-448 (2016) - 2014
- [j27]Yingchong Situ, Chandra S. Martha, Matthew E. Louis, Zhiyuan Li, Ahmed H. Sameh, Gregory A. Blaisdell, Anastasios S. Lyrintzis:
Petascale large eddy simulation of jet engine noise based on the truncated SPIKE algorithm. Parallel Comput. 40(9): 496-511 (2014) - [c62]Zhiyuan Li:
Author's retrospective for array privatization for parallel execution of loops. ICS 25th Anniversary 2014: 21-23 - 2013
- [j26]Yingchong Situ, Lixia Liu, Chandra S. Martha, Matthew E. Louis, Zhiyuan Li, Ahmed H. Sameh, Gregory A. Blaisdell, Anastasios S. Lyrintzis:
A communication-efficient linear system solver for large eddy simulation of jet engine noise. Clust. Comput. 16(1): 157-170 (2013) - [c61]Man Wang, Zhiyuan Li:
Global property violation detection and diagnosis for wireless sensor networks. CASES 2013: 23:1-23:10 - [c60]Feng Li, Wei Huo, Congming Chen, Lujie Zhong, Xiaobing Feng, Zhiyuan Li:
Effective fault localization based on minimum debugging frontier set. CGO 2013: 5:1-5:10 - [c59]Yingchong Situ, Ye Wang, Zhiyuan Li:
Automated Rapid Prototyping of Regular Grid-Based Numerical Applications Using Generalized Elemental Subroutines. IPDPS 2013: 284-294 - [c58]Hongtao Yu, Hou-Jen Ko, Zhiyuan Li:
General data structure expansion for multi-threading. PLDI 2013: 243-252 - 2012
- [c57]Hongtao Yu, Zhiyuan Li:
Fast loop-level data dependence profiling. ICS 2012: 37-46 - [c56]Peter Kristof, Hongtao Yu, Zhiyuan Li, Xinmin Tian:
Performance Study of SIMD Programming Models on Intel Multicore Processors. IPDPS Workshops 2012: 2423-2432 - [c55]Hongtao Yu, Zhiyuan Li:
Multi-slicing: a compiler-supported parallel approach to data dependence profiling. ISSTA 2012: 23-33 - 2011
- [c54]Long Chen, Wei Huo, Haitao Mi, Zhaoqing Zhang, Xiaobing Feng, Zhiyuan Li:
Parallelizing a machine translation decoder for multicore computer. ICNC 2011: 2220-2225 - [c53]Man Wang, Zhiyuan Li, Feng Li, Xiaobing Feng, Saurabh Bagchi, Yung-Hsiang Lu:
Dependence-based multi-level tracing and replay for wireless sensor networks debugging. LCTES 2011: 91-100 - [r1]Giorgios Kollias, Ananth Grama, Zhiyuan Li:
Asynchronous Iterative Algorithms. Encyclopedia of Parallel Computing 2011: 87-95 - 2010
- [c52]Yingchong Situ, Lixia Liu, Chandra S. Martha, Matthew E. Louis, Zhiyuan Li, Ahmed H. Sameh, Gregory A. Blaisdell, Anastasios S. Lyrintzis:
Reducing Communication Overhead in Large Eddy Simulation of Jet Engine Noise. CLUSTER 2010: 255-264 - [c51]Lixia Liu, Zhiyuan Li:
A compiler-automated array compression scheme for optimizing memory intensive programs. ICS 2010: 285-294 - [c50]Lixia Liu, Zhiyuan Li:
Improving parallelism and locality with asynchronous algorithms. PPoPP 2010: 213-222
2000 – 2009
- 2009
- [j25]Zhiyuan Li, Santosh Pande:
Editorial: Languages, compilers, and tools for embedded systems. ACM Trans. Embed. Comput. Syst. 8(4): 25:1-25:2 (2009) - [c49]Matthew Tan Creti, Matthew Beaman, Saurabh Bagchi, Zhiyuan Li, Yung-Hsiang Lu:
Multigrade Security Monitoring for Ad-Hoc Wireless Networks. MASS 2009: 342-352 - 2008
- [j24]Changjiu Xian, Yung-Hsiang Lu, Zhiyuan Li:
Dynamic Voltage Scaling for Multitasking Real-Time Systems With Uncertain Execution Time. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27(8): 1467-1478 (2008) - [c48]Fang Lu, Lei Wang, Xiaobing Feng, Zhiyuan Li, Zhaoqing Zhang:
Exploiting idle register classes for fast spill destination. ICS 2008: 319-326 - [c47]Lixia Liu, Zhiyuan Li, Ahmed H. Sameh:
Analyzing memory access intensity in parallel programs on multicore. ICS 2008: 359-367 - [c46]Russell Meyers, Zhiyuan Li:
ASYNC Loop Constructs for Relaxed Synchronization. LCPC 2008: 292-303 - [c45]Vinaitheerthan Sundaram, Saurabh Bagchi, Yung-Hsiang Lu, Zhiyuan Li:
SeNDORComm: An Energy-Efficient Priority-Driven Communication Layer for Reliable Wireless Sensor Networks. SRDS 2008: 23-32 - 2007
- [j23]Zhiyuan Li:
Simultaneous Minimization of Capacity and Conflict Misses. J. Comput. Sci. Technol. 22(4): 497-504 (2007) - [j22]Douglas Herbert, Vinaitheerthan Sundaram, Yung-Hsiang Lu, Saurabh Bagchi, Zhiyuan Li:
Adaptive correctness monitoring for wireless sensor networks using hierarchical distributed run-time invariant checking. ACM Trans. Auton. Adapt. Syst. 2(3): 8 (2007) - [c44]Changjiu Xian, Yung-Hsiang Lu, Zhiyuan Li:
Energy-Aware Scheduling for Real-Time Multiprocessor Systems with Uncertain Task Execution Time. DAC 2007: 664-669 - [c43]Changjiu Xian, Yung-Hsiang Lu, Zhiyuan Li:
Adaptive computation offloading for energy conservation on battery-powered systems. ICPADS 2007: 1-8 - [c42]Changjiu Xian, Yung-Hsiang Lu, Zhiyuan Li:
A programming environment with runtime energy characterization for energy-aware applications. ISLPED 2007: 141-146 - [e4]Santosh Pande, Zhiyuan Li:
Proceedings of the 2007 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'07), San Diego, California, USA, June 13-15, 2007. ACM 2007, ISBN 978-1-59593-632-5 [contents] - 2006
- [c41]Douglas Herbert, Yung-Hsiang Lu, Saurabh Bagchi, Zhiyuan Li:
Detection and Repair of Software Errors in Hierarchical Sensor Networks. SUTC (1) 2006: 403-410 - 2005
- [j21]Yonghong Song, Cheng Wang, Zhiyuan Li:
A Polynomial-Time Algorithm for Memory Space Reduction. Int. J. Parallel Program. 33(1): 1-33 (2005) - [j20]Zhiyuan Li, Rong Xu:
Page mapping for heterogeneously partitioned caches: Complexity and heuristics. J. Embed. Comput. 1(4): 471-485 (2005) - [c40]Rong Xu, Zhiyuan Li:
A sample-based cache mapping scheme. LCTES 2005: 166-174 - [e3]Rudolf Eigenmann, Zhiyuan Li, Samuel P. Midkiff:
Languages and Compilers for High Performance Computing, 17th International Workshop, LCPC 2004, West Lafayette, IN, USA, September 22-24, 2004, Revised Selected Papers. Lecture Notes in Computer Science 3602, Springer 2005, ISBN 3-540-28009-X [contents] - 2004
- [j19]Cheng Wang, Zhiyuan Li:
A computation offloading scheme on handheld devices. J. Parallel Distributed Comput. 64(6): 740-746 (2004) - [j18]Peifeng Ni, Zhiyuan Li:
Energy cost analysis of IPSec on handheld devices. Microprocess. Microsystems 28(10): 585-594 (2004) - [j17]Yonghong Song, Rong Xu, Cheng Wang, Zhiyuan Li:
Improving Data Locality by Array Contraction. IEEE Trans. Computers 53(9): 1073-1084 (2004) - [j16]Zhiyuan Li, Yonghong Song:
Automatic tiling of iterative stencil loops. ACM Trans. Program. Lang. Syst. 26(6): 975-1028 (2004) - [c39]Yonghua Ding, Zhiyuan Li:
A Compiler Scheme for Reusing Intermediate Computation Results. CGO 2004: 279-290 - [c38]Yuldi Tirta, Zhiyuan Li, Yung-Hsiang Lu, Saurabh Bagchi:
Efficient Collection of Sensor Data in Remote Fields Using Mobile Collectors. ICCCN 2004: 515-520 - [c37]Yonghong Song, Zhiyuan Li:
Applying Array Contraction to a Sequence of DOALL Loops. ICPP 2004: 46-53 - [c36]Rong Xu, Zhiyuan Li:
Using cache mapping to improve memory performance handheld devices. ISPASS 2004: 106-114 - [c35]Cheng Wang, Zhiyuan Li:
Parametric analysis for adaptive computation offloading. PLDI 2004: 119-130 - 2003
- [c34]Rong Xu, Zhiyuan Li, Cheng Wang, Peifeng Ni:
Impact of Data Compression on Energy Consumption of Wireless-Networked Handheld Devices. ICDCS 2003: 302-311 - [c33]Zhiyuan Li:
Optimal Skewed Tiling for Cache Locality Enhancement. IPDPS 2003: 37 - [c32]Yonghua Ding, Zhiyuan Li:
Operation Reuse on Handheld Devices (Extended Abstract). LCPC 2003: 273-287 - [c31]Yonghua Ding, Zhiyuan Li:
A Compiler Analysis of Interprocedural Data Communication. SC 2003: 11 - 2002
- [c30]Zhiyuan Li, Cheng Wang, Rong Xu:
Task Allocation for Distributed Multimedia Processing on Wirelessly Networked Handheld Devices. IPDPS 2002 - 2001
- [j15]Guohua Jin, Zhiyuan Li, Fujie Chen:
A theoretical foundation for program transformations to reduce cache thrashing due to true data sharing. Theor. Comput. Sci. 255(1-2): 449-481 (2001) - [c29]Zhiyuan Li, Cheng Wang, Rong Xu:
Computation offloading to save energy on handheld devices: a partition scheme. CASES 2001: 238-246 - [c28]Zhiyuan Li, Junjie Gu, Gyungho Lee:
Interprocedural Analysis Based on Guarded Array Regions. Compiler Optimizations for Scalable Parallel Systems Languages 2001: 221-246 - [c27]Yonghong Song, Rong Xu, Cheng Wang, Zhiyuan Li:
Data locality enhancement by memory reduction. ICS 2001: 50-64 - [c26]Yonghong Song, Cheng Wang, Zhiyuan Li:
Locality Enhancement by Array Contraction. LCPC 2001: 132-146 - [c25]Yonghua Ding, Zhiyuan Li:
An Adaptive Scheme for Dynamic Parallelization. LCPC 2001: 274-289 - 2000
- [j14]Zhiyuan Li, Junjie Gu:
A Hierarchical Reasoning System for Automatic Program Parallelization. Int. J. Artif. Intell. Tools 9(3): 417-435 (2000) - [j13]Junjie Gu, Zhiyuan Li:
Efficient Interprocedural Array Data-Flow Analysis for Automatic Program Parallelization. IEEE Trans. Software Eng. 26(3): 244-261 (2000)
1990 – 1999
- 1999
- [c24]Zhiyuan Li:
Reducing Cache Conflicts by Partitioning and Privatizing Shared Arrays. IEEE PACT 1999: 183-190 - [c23]Yonghong Song, Zhiyuan Li:
A Compiler Framework for Tiling Imperfectly-Nested Loops. LCPC 1999: 185-200 - [c22]Yonghong Song, Zhiyuan Li:
New Tiling Techniques to Improve Cache Temporal Locality. PLDI 1999: 215-228 - [e2]Siddhartha Chatterjee, Jan F. Prins, Larry Carter, Jeanne Ferrante, Zhiyuan Li, David C. Sehr, Pen-Chung Yew:
Languages and Compilers for Parallel Computing, 11th International Workshop, LCPC'98, Chapel Hill, NC, USA, August 7-9, 1998, Proceedings. Lecture Notes in Computer Science 1656, Springer 1999, ISBN 3-540-66426-2 [contents] - 1998
- [j12]Zhiyuan Li, Pen-Chung Yew:
Introduction. Int. J. Parallel Program. 26(5): 539-540 (1998) - [j11]Zhiyuan Li, Pen-Chung Yew:
Introduction. Int. J. Parallel Program. 26(6): 639-640 (1998) - [j10]Jenn-Yuan Tsai, Zhenzhen Jiang, Zhiyuan Li, David J. Lilja, Xin Wang, Pen-Chung Yew, Bixia Zheng, Stephen J. Schwinn:
Integrating Parallelizing Compilation Technology and Processor Architecture for Cost-Effective Concurrent multithreading. J. Inf. Sci. Eng. 14(1): 205-222 (1998) - [j9]Zhiyuan Li, Jian Huang, Guohua Jin:
Page-mapping techniques to reduce cache conflicts on CC-NUMA multiprocessors. Microprocess. Microsystems 22(3-4): 165-174 (1998) - [j8]Trung N. Nguyen, Zhiyuan Li:
Interprocedural Analysis for Loop Scheduling and Data Allocation. Parallel Comput. 24(3-4): 477-504 (1998) - [j7]Guohua Jin, Zhiyuan Li, Fujie Chen:
An Efficient Solution to the Cache Thrashing Problem Caused by True Data Sharing. IEEE Trans. Computers 47(5): 527-543 (1998) - [c21]Sangyeun Cho, Jenn-Yuan Tsai, Yonghong Song, Bixia Zheng, Stephen J. Schwinn, Xin Wang, Qing Zhao, Zhiyuan Li, David J. Lilja, Pen-Chung Yew:
High-Level Information - An Approach for Integrating Front-End and Back-End Compilers. ICPP 1998: 346-355 - [e1]Zhiyuan Li, Pen-Chung Yew, Siddhartha Chatterjee, Chua-Huang Huang, P. Sadayappan, David C. Sehr:
Languages and Compilers for Parallel Computing, 10th International Workshop, LCPC'97, Minneapolis, Minnesota, USA, August 7-9, 1997, Proceedings. Lecture Notes in Computer Science 1366, Springer 1998, ISBN 3-540-64472-5 [contents] - 1997
- [c20]Junjie Gu, Zhiyuan Li, Gyungho Lee:
Experience with Efficient Array Data-Flow Analysis for Array Privatization. PPoPP 1997: 157-167 - 1996
- [c19]Zhiyuan Li, Jenn-Yuan Tsai, Xin Wang, Pen-Chung Yew, Bess Zheng:
Compiler Techniques for Concurrent Multithreading with Hardware Speculation Support. LCPC 1996: 175-191 - 1995
- [c18]John Willis, Zhiyuan Li, Tsang-Puu Lin:
Use of embedded scheduling to compile VHDL for effective parallel simulation. EURO-DAC 1995: 400-405 - [c17]Trung N. Nguyen, Junjie Gu, Zhiyuan Li:
An Interprocedural Parallelizing Compiler and Its Support for Memory Hierarchy Research. LCPC 1995: 96-110 - [c16]Junjie Gu, Zhiyuan Li, Gyungho Lee:
Symbolic Array Dataflow Analysis for Array Privatization and Program Parallelization. SC 1995: 47 - 1994
- [c15]Zhiyuan Li, Trung N. Nguyen:
An Empirical Study of the Workload Distribution Under Static Scheduling. ICPP (2) 1994: 259-263 - [c14]Farnaz Mounes-Toussi, David J. Lilja, Zhiyuan Li:
An evaluation of a compiler optimization for improving the performance of a coherence directory. International Conference on Supercomputing 1994: 75-84 - [c13]Trung N. Nguyen, Farnaz Mounes-Toussi, David J. Lilja, Zhiyuan Li:
A Compiler-Assisted Scheme for Adaptive Cache Coherence Enforcement. IFIP PACT 1994: 69-78 - [c12]Zhiyuan Li:
Software Assistance for Directory-Based Caches. IPPS 1994: 151-157 - 1993
- [j6]Rudolf Eigenmann, Jay P. Hoeflinger, Greg P. Jaxon, Zhiyuan Li, David A. Padua:
Restructuring Fortran programs for Cedar. Concurr. Pract. Exp. 5(7): 553-573 (1993) - [c11]Trung N. Nguyen, Zhiyuan Li, David J. Lilja:
Efficient Use of Dynamically Tagged Directories Through Compiler Analysis. ICPP (2) 1993: 112-119 - [c10]David J. Kuck, Edward S. Davidson, Duncan H. Lawrie, Ahmed H. Sameh, Chuan-Qi Zhu, Alexander V. Veidenbaum, Jeff Konicek, Pen-Chung Yew, Kyle A. Gallivan, William Jalby, Harry A. G. Wijshoff, Randall Bramley, Ulrike Meier Yang, Perry A. Emrath, David A. Padua, Rudolf Eigenmann, Jay P. Hoeflinger, Greg P. Jaxon, Zhiyuan Li, T. Murphy, John T. Andrews, Stephen W. Turner:
The Cedar System and an Initial Performance Study. ISCA 1993: 213-223 - 1992
- [c9]Zhiyuan Li:
Array privatization for parallel execution of loops. ICS 1992: 313-322 - 1991
- [c8]Rudolf Eigenmann, Jay P. Hoeflinger, Greg P. Jaxon, Zhiyuan Li, David A. Padua:
Restructuring Fortran Programs for Cedar. ICPP (1) 1991: 57-66 - [c7]Zhiyuan Li:
Compiler algorithms for event variable synchronization. ICS 1991: 85-95 - [c6]Rudolf Eigenmann, Jay P. Hoeflinger, Zhiyuan Li, David A. Padua:
Experience in the Automatic Parallelization of Four Perfect-Benchmark Programs. LCPC 1991: 65-83 - 1990
- [j5]Zhiyuan Li, Pen-Chung Yew, Chuan-Qi Zhu:
An Efficient Data Dependence Analysis for Parallelizing Compilers. IEEE Trans. Parallel Distributed Syst. 1(1): 26-34 (1990) - [j4]Zhiyu Shen, Zhiyuan Li, Pen-Chung Yew:
An Empirical Study of Fortran Programs for Parallelizing Compilers. IEEE Trans. Parallel Distributed Syst. 1(3): 356-364 (1990)
1980 – 1989
- 1989
- [b1]Zhiyuan Li:
Intraprocedural and interprocedural data dependence analysis for parallel computing. University of Illinois Urbana-Champaign, USA, 1989 - [j3]Zhiyuan Li, Edward M. Reingold:
Solution of a Divide-and-Conquer Maximin Recurrence. SIAM J. Comput. 18(6): 1188-1200 (1989) - [c5]Zhiyu Shen, Zhiyuan Li, Pen-Chung Yew:
An Empirical Study on Array Subscripts and Data Dependencies. ICPP (2) 1989: 145-152 - [c4]Zhiyuan Li, Pen-Chung Yew, Chuan-Qi Zhu:
Data dependence analysis on multi-dimensional array references. ICS 1989: 215-224 - 1988
- [j2]Zhiyuan Li, Pen-Chung Yew:
Program parallelization with interprocedural analysis. J. Supercomput. 2(2): 225-244 (1988) - [c3]Zhiyuan Li, Pen-Chung Yew:
Interprocedural Analysis for Parallel Programs. ICPP (2) 1988: 221-228 - [c2]Zhiyuan Li, Pen-Chung Yew:
Efficient Interprocedural Analysis for Program Parallelization and Restructuring. PPOPP/PPEALS 1988: 85-99 - 1987
- [j1]Zhiyuan Li, Walid A. Abu-Sufah:
On Reducing Data Synchronization in Multiprocessed Loops. IEEE Trans. Computers 36(1): 105-109 (1987) - 1985
- [c1]Zhiyuan Li, Walid A. Abu-Sufah:
A Technique for Reducing Synchronization Overhead in Large Scale Multiprocessors. ISCA 1985: 284-291
Coauthor Index
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