BibTeX record conf/aspdac/JainSC15

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@inproceedings{DBLP:conf/aspdac/JainSC15,
  author       = {Palkesh Jain and
                  Sachin S. Sapatnekar and
                  Jordi Cortadella},
  title        = {A retargetable and accurate methodology for logic-IP-internal electromigration
                  assessment},
  booktitle    = {The 20th Asia and South Pacific Design Automation Conference, {ASP-DAC}
                  2015, Chiba, Japan, January 19-22, 2015},
  pages        = {346--351},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/ASPDAC.2015.7059029},
  doi          = {10.1109/ASPDAC.2015.7059029},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/aspdac/JainSC15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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