BibTeX record conf/aspdac/WangPCG14

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@inproceedings{DBLP:conf/aspdac/WangPCG14,
  author       = {Shaodi Wang and
                  Andrew Pan and
                  Chi On Chui and
                  Puneet Gupta},
  title        = {{PROCEED:} {A} pareto optimization-based circuit-level evaluator for
                  emerging devices},
  booktitle    = {19th Asia and South Pacific Design Automation Conference, {ASP-DAC}
                  2014, Singapore, January 20-23, 2014},
  pages        = {818--824},
  publisher    = {{IEEE}},
  year         = {2014},
  url          = {https://doi.org/10.1109/ASPDAC.2014.6742991},
  doi          = {10.1109/ASPDAC.2014.6742991},
  timestamp    = {Thu, 28 Oct 2021 13:52:50 +0200},
  biburl       = {https://dblp.org/rec/conf/aspdac/WangPCG14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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