BibTeX record conf/asscc/BaileyHRLCMWMIW18

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@inproceedings{DBLP:conf/asscc/BaileyHRLCMWMIW18,
  author       = {Stevo Bailey and
                  Jaeduk Han and
                  Paul Rigge and
                  Richard Lin and
                  Eric Chang and
                  Howard Mao and
                  Zhongkai Wang and
                  Chick Markley and
                  Adam M. Izraelevitz and
                  Angie Wang and
                  Nathan Narevsky and
                  Woo{-}Rham Bae and
                  Steve Shauck and
                  Sergio Montano and
                  Justin Norsworthy and
                  Munir Razzaque and
                  Wen Hau Ma and
                  Akalu Lentiro and
                  Matthew Doerflein and
                  Darin Heckendorn and
                  Jim McGrath and
                  Franco DeSeta and
                  Ronen Shoham and
                  Mike Stellfox and
                  Mark Snowden and
                  Joseph Cole and
                  Dan Fuhrman and
                  Brian C. Richards and
                  Jonathan Bachrach and
                  Elad Alon and
                  Borivoje Nikolic},
  title        = {A Generated Multirate Signal Analysis {RISC-V} SoC in 16nm FinFET},
  booktitle    = {{IEEE} Asian Solid-State Circuits Conference, {A-SSCC} 2018, Tainan,
                  Taiwan, November 5-7, 2018},
  pages        = {285--288},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/ASSCC.2018.8579326},
  doi          = {10.1109/ASSCC.2018.8579326},
  timestamp    = {Fri, 27 Mar 2020 08:59:44 +0100},
  biburl       = {https://dblp.org/rec/conf/asscc/BaileyHRLCMWMIW18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}