BibTeX record conf/ats/RenovellHB95

download as .bib file

@inproceedings{DBLP:conf/ats/RenovellHB95,
  author       = {Michel Renovell and
                  P. Huc and
                  Yves Bertrand},
  title        = {Serial transistor network modeling for bridging fault simulation},
  booktitle    = {4th Asian Test Symposium {(ATS} '95), November 23-24, 1995. Bangalore,
                  India},
  pages        = {100--106},
  publisher    = {{IEEE} Computer Society},
  year         = {1995},
  url          = {https://doi.org/10.1109/ATS.1995.485323},
  doi          = {10.1109/ATS.1995.485323},
  timestamp    = {Fri, 24 Mar 2023 00:02:34 +0100},
  biburl       = {https://dblp.org/rec/conf/ats/RenovellHB95.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
a service of  Schloss Dagstuhl - Leibniz Center for Informatics

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.