BibTeX record conf/hotchips/VenkatesanSZCFJ19

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@inproceedings{DBLP:conf/hotchips/VenkatesanSZCFJ19,
  author       = {Rangharajan Venkatesan and
                  Yakun Sophia Shao and
                  Brian Zimmer and
                  Jason Clemons and
                  Matthew Fojtik and
                  Nan Jiang and
                  Ben Keller and
                  Alicia Klinefelter and
                  Nathaniel Ross Pinckney and
                  Priyanka Raina and
                  Stephen G. Tell and
                  Yanqing Zhang and
                  William J. Dally and
                  Joel S. Emer and
                  C. Thomas Gray and
                  Stephen W. Keckler and
                  Brucek Khailany},
  title        = {A 0.11 PJ/OP, 0.32-128 Tops, Scalable Multi-Chip-Module-Based Deep
                  Neural Network Accelerator Designed with {A} High-Productivity vlsi
                  Methodology},
  booktitle    = {2019 {IEEE} Hot Chips 31 Symposium (HCS), Cupertino, CA, USA, August
                  18-20, 2019},
  pages        = {1--24},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/HOTCHIPS.2019.8875657},
  doi          = {10.1109/HOTCHIPS.2019.8875657},
  timestamp    = {Thu, 23 Mar 2023 11:42:26 +0100},
  biburl       = {https://dblp.org/rec/conf/hotchips/VenkatesanSZCFJ19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}