BibTeX record conf/isce/ChunLR15

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@inproceedings{DBLP:conf/isce/ChunLR15,
  author       = {Ki Bum Chun and
                  Changmin Lee and
                  Won Woo Ro},
  title        = {A frequency scaling model for energy efficient {DVFS} designs based
                  on circuit delay optimization},
  booktitle    = {International Symposium on Consumer Electronics, {ISCE} 2015, Madrid,
                  Spain, June 24-26, 2015},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/ISCE.2015.7177841},
  doi          = {10.1109/ISCE.2015.7177841},
  timestamp    = {Fri, 26 Nov 2021 08:19:44 +0100},
  biburl       = {https://dblp.org/rec/conf/isce/ChunLR15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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