BibTeX record conf/isicir/FujitaNITNA14

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@inproceedings{DBLP:conf/isicir/FujitaNITNA14,
  author    = {Shinobu Fujita and
               Hiroki Noguchi and
               Kazutaka Ikegami and
               Susumu Takeda and
               Kumiko Nomura and
               Keiko Abe},
  title     = {Novel STT-MRAM-based last level caches for high performance processors
               using normally-off architectures},
  booktitle = {2014 International Symposium on Integrated Circuits (ISIC), Singapore,
               December 10-12, 2014},
  pages     = {316--319},
  publisher = {{IEEE}},
  year      = {2014},
  url       = {https://doi.org/10.1109/ISICIR.2014.7029504},
  doi       = {10.1109/ISICIR.2014.7029504},
  timestamp = {Wed, 16 Oct 2019 14:14:56 +0200},
  biburl    = {https://dblp.org/rec/conf/isicir/FujitaNITNA14.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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