BibTeX record conf/ismvl/Al-WardiWD16

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@inproceedings{DBLP:conf/ismvl/Al-WardiWD16,
  author       = {Zaid Al{-}Wardi and
                  Robert Wille and
                  Rolf Drechsler},
  title        = {Re-Writing {HDL} Descriptions for Line-Aware Synthesis of Reversible
                  Circuits},
  booktitle    = {46th {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL}
                  2016, Sapporo, Japan, May 18-20, 2016},
  pages        = {31--36},
  publisher    = {{IEEE} Computer Society},
  year         = {2016},
  url          = {https://doi.org/10.1109/ISMVL.2016.36},
  doi          = {10.1109/ISMVL.2016.36},
  timestamp    = {Thu, 23 Mar 2023 23:59:56 +0100},
  biburl       = {https://dblp.org/rec/conf/ismvl/Al-WardiWD16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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