BibTeX record conf/ispa/Zhang0TLTW18

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@inproceedings{DBLP:conf/ispa/Zhang0TLTW18,
  author       = {Yang Zhang and
                  Dan Feng and
                  Zhipeng Tan and
                  Jingning Liu and
                  Wei Tong and
                  Chengning Wang},
  editor       = {Jinjun Chen and
                  Laurence T. Yang},
  title        = {Asymmetric-ReRAM: {A} Low Latency and High Reliability Crossbar Resistive
                  Memory Architecture},
  booktitle    = {{IEEE} International Conference on Parallel {\&} Distributed Processing
                  with Applications, Ubiquitous Computing {\&} Communications, Big
                  Data {\&} Cloud Computing, Social Computing {\&} Networking,
                  Sustainable Computing {\&} Communications, ISPA/IUCC/BDCloud/SocialCom/SustainCom
                  2018, Melbourne, Australia, December 11-13, 2018},
  pages        = {330--337},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/BDCloud.2018.00059},
  doi          = {10.1109/BDCLOUD.2018.00059},
  timestamp    = {Sat, 09 Apr 2022 12:43:12 +0200},
  biburl       = {https://dblp.org/rec/conf/ispa/Zhang0TLTW18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}