BibTeX record conf/isscc/HartBCGGHHJJKKMNRSSTQY13

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@inproceedings{DBLP:conf/isscc/HartBCGGHHJJKKMNRSSTQY13,
  author       = {Jason Hart and
                  Steve Butler and
                  Hoyeol Cho and
                  Yuefei Ge and
                  Gregory Gruber and
                  Dawei Huang and
                  Changku Hwang and
                  Daisy Jian and
                  Timothy Johnson and
                  Georgios K. Konstadinidis and
                  Lance Kwong and
                  Robert P. Masleid and
                  Umesh Nawathe and
                  Aparna Ramachandran and
                  Yongning Sheng and
                  Jinuk Luke Shin and
                  Sebastian Turullols and
                  Zuxu Qin and
                  King C. Yen},
  title        = {3.6GHz 16-core {SPARC} SoC processor in 28nm},
  booktitle    = {2013 {IEEE} International Solid-State Circuits Conference - Digest
                  of Technical Papers, {ISSCC} 2013, San Francisco, CA, USA, February
                  17-21, 2013},
  pages        = {48--49},
  publisher    = {{IEEE}},
  year         = {2013},
  url          = {https://doi.org/10.1109/ISSCC.2013.6487631},
  doi          = {10.1109/ISSCC.2013.6487631},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/HartBCGGHHJJKKMNRSSTQY13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}