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BibTeX record conf/latw/SinanogluA12
@inproceedings{DBLP:conf/latw/SinanogluA12, author = {Ozgur Sinanoglu and Vishwani D. Agrawal}, title = {Retiming scan circuit to eliminate timing penalty}, booktitle = {13th Latin American Test Workshop, {LATW} 2012, Quito, Ecuador, April 10-13, 2012}, pages = {1--6}, publisher = {{IEEE} Computer Society}, year = {2012}, url = {https://doi.org/10.1109/LATW.2012.6261252}, doi = {10.1109/LATW.2012.6261252}, timestamp = {Thu, 23 Mar 2023 23:59:13 +0100}, biburl = {https://dblp.org/rec/conf/latw/SinanogluA12.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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