BibTeX record conf/parelec/SrinivasanDNDA06

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@inproceedings{DBLP:conf/parelec/SrinivasanDNDA06,
  author       = {T. Srinivasan and
                  N. Dhanasekar and
                  M. Nivedita and
                  R. Dhivyakrishnan and
                  A. A. Azeezunnisa},
  title        = {Scalable and Parallel Aggregated Bit Vector Packet Classification
                  Using Prefix Computation Model},
  booktitle    = {Fifth International Conference on Parallel Computing in Electrical
                  Engineering {(PARELEC} 2006), 13-17 September 2006, Bialystok, Poland},
  pages        = {139--144},
  publisher    = {{IEEE} Computer Society},
  year         = {2006},
  url          = {https://doi.org/10.1109/PARELEC.2006.71},
  doi          = {10.1109/PARELEC.2006.71},
  timestamp    = {Thu, 23 Mar 2023 23:59:38 +0100},
  biburl       = {https://dblp.org/rec/conf/parelec/SrinivasanDNDA06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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