BibTeX record conf/patmos/GoelBGV07

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@inproceedings{DBLP:conf/patmos/GoelBGV07,
  author       = {Amit Goel and
                  Sarvesh Bhardwaj and
                  Praveen Ghanta and
                  Sarma B. K. Vrudhula},
  editor       = {Nadine Az{\'{e}}mard and
                  Lars J. Svensson},
  title        = {Computation of Joint Timing Yield of Sequential Networks Considering
                  Process Variations},
  booktitle    = {Integrated Circuit and System Design. Power and Timing Modeling, Optimization
                  and Simulation, 17th International Workshop, {PATMOS} 2007, Gothenburg,
                  Sweden, September 3-5, 2007, Proceedings},
  series       = {Lecture Notes in Computer Science},
  volume       = {4644},
  pages        = {125--137},
  publisher    = {Springer},
  year         = {2007},
  url          = {https://doi.org/10.1007/978-3-540-74442-9\_13},
  doi          = {10.1007/978-3-540-74442-9\_13},
  timestamp    = {Tue, 14 May 2019 10:00:54 +0200},
  biburl       = {https://dblp.org/rec/conf/patmos/GoelBGV07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}