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BibTeX record conf/patmos/TonfatFR16
@inproceedings{DBLP:conf/patmos/TonfatFR16, author = {Jorge L. Tonfat and Guilherme Flach and Ricardo Reis}, title = {Leakage current analysis in static {CMOS} logic gates for a transistor network design approach}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {107--113}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833673}, doi = {10.1109/PATMOS.2016.7833673}, timestamp = {Tue, 22 Oct 2019 15:21:17 +0200}, biburl = {https://dblp.org/rec/conf/patmos/TonfatFR16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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