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BibTeX record conf/vlsi-dat/ZhangZRW19
@inproceedings{DBLP:conf/vlsi-dat/ZhangZRW19, author = {Yining Zhang and Jiahao Zhao and Woogeun Rhee and Zhihua Wang}, title = {Design and Analysis of Data-Pattern-Insensitive Phase-Tracking Receivers with Fully-Balanced {FSK} Modulation}, booktitle = {International Symposium on {VLSI} Design, Automation and Test, {VLSI-DAT} 2019, Hsinchu, Taiwan, April 22-25, 2019}, pages = {1--4}, publisher = {{IEEE}}, year = {2019}, url = {https://doi.org/10.1109/VLSI-DAT.2019.8741607}, doi = {10.1109/VLSI-DAT.2019.8741607}, timestamp = {Sat, 09 Apr 2022 12:34:02 +0200}, biburl = {https://dblp.org/rec/conf/vlsi-dat/ZhangZRW19.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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